Issued Patents All Time
Showing 1–25 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7813198 | System and method for reading memory | Stephen Keith Heinrich-Barna | 2010-10-12 |
| 7630257 | Methods and systems for accessing memory | Sudhir K. Madan, Hugh P. McAdams | 2009-12-08 |
| 7463504 | Active float for the dummy bit lines in FeRAM | Sudhir K. Madan | 2008-12-09 |
| 7443708 | Low resistance plate line bus architecture | Sudhir K. Madan, John Fong | 2008-10-28 |
| 7349237 | Plateline driver with RAMP rate control | Sudhir K. Madan, John Fong | 2008-03-25 |
| 7301795 | Accelerated low power fatigue testing of FRAM | John Fong, Anand Seshadri, Sudhir K. Madan, Jarrod Eliason | 2007-11-27 |
| 7133304 | Method and apparatus to reduce storage node disturbance in ferroelectric memory | Sudhir K. Madan, Hugh P. McAdams, Anand Seshadri, Jarrod Eliason | 2006-11-07 |
| 6826103 | Auto-tuneable reference circuit for flash EEPROM products | Nathan Moon, Richard K. Eguchi | 2004-11-30 |
| 6751125 | Gate voltage reduction in a memory read | Erwin J. Prinz, Craig T. Swift, Jane A. Yater, Frank K. Baker, Jr. | 2004-06-15 |
| 5694073 | Temperature and supply-voltage sensing circuit | Timothy J. Coots, Phat C. Truong, Tim M. Coffman, Ming-Bo Liu, Ronald J. Syzdek | 1997-12-02 |
| 5668769 | Memory device performance by delayed power-down | Tim M. Coffman, Ronald J. Syzdek, Timothy J. Coots, Phat C. Truong | 1997-09-16 |
| 5657268 | Array-source line, bitline and wordline sequence in flash operations | Phat C. Truong | 1997-08-12 |
| 5646894 | Smart boost circuit for low voltage flash EPROM | Tim M. Coffman, Ronald J. Syzdek | 1997-07-08 |
| 5636162 | Erase procedure | Tim M. Coffman, Phat C. Truong | 1997-06-03 |
| 5523249 | Method of making an EEPROM cell with separate erasing and programming regions | Manzur Gill, David J. McElroy, Inn K. Lee | 1996-06-04 |
| 5491809 | Smart erase algorithm with secure scheme for flash EPROMs | Tim M. Coffman, T. Damodar Reddy | 1996-02-13 |
| 5450417 | Circuit for testing power-on-reset circuitry | Phat C. Truong, Tim M. Coffman, T. Damodar Reddy, Dennis R. Robinson | 1995-09-12 |
| 5424992 | Method and device for detecting and controlling an array source signal discharge for a memory erase operation | Tim M. Coffman, Dennis R. Robinson, Phat C. Truong, T. Damodar Reddy | 1995-06-13 |
| 5422590 | High voltage negative charge pump with low voltage CMOS transistors | Tim M. Coffman | 1995-06-06 |
| 5397946 | High-voltage sensor for integrated circuits | Phat C. Truong, Tim M. Coffman, T. Damodar Reddy, Dennis R. Robinson | 1995-03-14 |
| 5396115 | Current-sensing power-on reset circuit for integrated circuits | Tim M. Coffman, Phat C. Truong, T. Damodar Reddy, Dennis R. Robinson | 1995-03-07 |
| 5392248 | Circuit and method for detecting column-line shorts in integrated-circuit memories | Phat C. Truong, Tim M. Coffman, T. Damodar Reddy, Dennis R. Robinson | 1995-02-21 |
| 5334550 | Method of producing a self-aligned window at recessed intersection of insulating regions | David J. McElroy, Manzur Gill | 1994-08-02 |
| 5335200 | High voltage negative charge pump with low voltage CMOS transistors | Tim M. Coffman | 1994-08-02 |
| 5313432 | Segmented, multiple-decoder memory array and method for programming a memory array | John F. Schreck, Phat C. Truong, David J. McElroy, Harvey J. Stiegler, Benjamin H. Ashmore, Jr. +1 more | 1994-05-17 |