Issued Patents All Time
Showing 26–40 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10460821 | Area efficient parallel test data path for embedded memories | Nikita Naresh, Vaskar Sarkar, Rajat Mehrotra | 2019-10-29 |
| 10331826 | False path timing exception handler circuit | Wilson Pradeep, Saket Jalan | 2019-06-25 |
| 10274538 | Full pad coverage boundary scan | Rajesh Mittal, Rajat Mehrotra | 2019-04-30 |
| 10184980 | Multiple input signature register analysis for digital circuitry | Naman Maheshwari, Wilson Pradeep | 2019-01-22 |
| 9952283 | Compressed scan chains with three input mask gates and registers | Rubin Ajit Parekhji, Arvind Jain, Sundarrajan Subramanian | 2018-04-24 |
| 9899103 | Area efficient parallel test data path for embedded memories | Nikita Naresh, Vaskar Sarkar, Rajat Mehrotra | 2018-02-20 |
| 9823282 | On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems | Sudhir Polarouthu | 2017-11-21 |
| 9791505 | Full pad coverage boundary scan | Rajesh Mittal, Rajat Mehrotra | 2017-10-17 |
| 9229055 | Decompressed scan chain masking circuit shift register with log2(n/n) cells | Arvind Jain, Sundarrajan Subramanian, Rubin Ajit Parekhji | 2016-01-05 |
| 9091729 | Scan chain masking qualification circuit shift register and bit-field decoders | Arvind Jain, Sundarrajan Subramanian, Rubin Ajit Parekhji | 2015-07-28 |
| 9081063 | On-chip IR drop detectors for functional and test mode scenarios, circuits, processes and systems | Sudhir Polarouthu | 2015-07-14 |
| 9053273 | IC delaying flip-flop output partial clock cycle for equalizing current | Sumanth Reddy Poddutur, Vivek Singhal | 2015-06-09 |
| 8972807 | Integrated circuits capable of generating test mode control signals for scan tests | Rajesh Mittal, Puneet Sabbarwal, Rubin Ajit Parekhji | 2015-03-03 |
| 8887018 | Masking circuit removing unknown bit from cell in scan chain | Arvind Jain, Sundarrajan Subramanian, Rubin Ajit Parekhji | 2014-11-11 |
| 8839063 | Circuits and methods for dynamic allocation of scan test resources | Rubin Ajit Parekhji, Srivaths Ravi, Milan Shetty | 2014-09-16 |