Issued Patents All Time
Showing 476–500 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8332700 | Multiplexer input linking circuitry to IC and core TAP domains | Baher Haroun, Brian J. Lasher, Anjali Kinra | 2012-12-11 |
| 8327203 | State machine transitioning from sequence 1 to sequence 2 to idle 2 | — | 2012-12-04 |
| 8325866 | Selection circuit enabling clock/mode or mode/clock signals | — | 2012-12-04 |
| 8324922 | Selective core functional and bypass circuitry | — | 2012-12-04 |
| 8324917 | Logic applying serial test bits to scan paths in parallel | — | 2012-12-04 |
| 8321729 | Divided scan path segments maintaining test pattern of stimulus/response connections | Jayashree Saxena | 2012-11-27 |
| 8321728 | TAP with serial I/O coupled to TCK | — | 2012-11-27 |
| 8316266 | Shifting bits in different scan paths with steady TMS | — | 2012-11-20 |
| 8301944 | State machine select inputs coupled to TDI, TCK, and TMS | — | 2012-10-30 |
| 8299464 | Comparator receiving expected and mask data from circuit pads | Alan Hales | 2012-10-30 |
| 8301946 | Inverted TCK access port selector with normal TCK data flip-flop | — | 2012-10-30 |
| 8296614 | Moving data through test control register with state machine states | — | 2012-10-23 |
| 8283665 | Scan paths, stimulus, and header circuitry with command/frame marker outputs | — | 2012-10-09 |
| 8281196 | Device address port circuitry with local, group, and global outputs | — | 2012-10-02 |
| 8281194 | Scan path switch testing of output buffer with ESD | — | 2012-10-02 |
| 8276030 | Scan distributor and parallel scan paths with controlled output buffer | — | 2012-09-25 |
| 8271840 | Multiplexer with serial and scan data inputs for scan path | — | 2012-09-18 |
| 8271839 | Link instruction register with resynchronization register | — | 2012-09-18 |
| 8261144 | Operating scan paths sequentially and capturing simultaneously | — | 2012-09-04 |
| 8255751 | Scan router connected with TAM core and test circuitry | — | 2012-08-28 |
| 8255750 | TAP linking module TDI multiplexer circuitry to plural TAPs | Baher Haroun | 2012-08-28 |
| 8250419 | Multiplexer for tap controller and WSP controller outputs | — | 2012-08-21 |
| 8250421 | Clock controller for JTAG interface | — | 2012-08-21 |
| 8234529 | HTMLS with first and second select outputs and enable inputs | — | 2012-07-31 |
| 8230280 | Source and destination data circuitry coupled to bi-directional TMS lead | — | 2012-07-24 |