Issued Patents All Time
Showing 501–525 of 865 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8230284 | Integrated circuit having electrically isolatable test circuitry | Richard L. Antley | 2012-07-24 |
| 8225158 | Compare circuit having inputs from scan registers and flip-flops | — | 2012-07-17 |
| 8225157 | Shadow protocol circuit having full and reduced pin select outputs | — | 2012-07-17 |
| 8219862 | Pass/fail scan memory with AND, OR and trinary gates | — | 2012-07-10 |
| 8214705 | IC with first and second external register present leads | — | 2012-07-03 |
| 8201036 | IC with test and shadow access ports and output circuit | — | 2012-06-12 |
| 8195994 | Inverter and TMS clocked flip-flop pairs between TCK and reset | — | 2012-06-05 |
| 8190954 | Core circuit test architecture | — | 2012-05-29 |
| 8185789 | Capturing response after simultaneously inputting last stimulus bit in scan path subdivisions | Joel J. Graber | 2012-05-22 |
| 8185790 | Resynchronization memory in series/parallel with control/output data scan cells | — | 2012-05-22 |
| 8176374 | Data register control of TDI/AX1 to the data register | — | 2012-05-08 |
| 8171360 | Linking module enable leads connected to plural TAPs | — | 2012-05-01 |
| 8171359 | Linking module connected to select leads of plural TAPs | — | 2012-05-01 |
| 8171361 | Multiplexer Control Circuitry for TAP Domain Selection Circuitry | — | 2012-05-01 |
| 8168970 | Die having embedded circuitry with test and test enable circuitry | Richard L. Antley | 2012-05-01 |
| 8166358 | Test access port with address and command capability | — | 2012-04-24 |
| 8161337 | Serially connected circuit blocks with TAPs and wrapper enable lead | — | 2012-04-17 |
| 8156394 | Selectively accessing test access ports in a multiple test access port environment | — | 2012-04-10 |
| 8145962 | TAP interface select circuit with TMS/RCK or RCK lead | — | 2012-03-27 |
| 8140926 | Die selectively connecting TAP leads to second die | — | 2012-03-20 |
| 8140924 | Selectively accessing test access ports in a multiple test access port environment | — | 2012-03-20 |
| 8136002 | Communication between controller and addressed target devices over data signal | — | 2012-03-13 |
| 8132064 | Selectively accessing test access ports in a multiple test access port environment | — | 2012-03-06 |
| 8127189 | Gates and sync circuitry connecting TAP to serial communications circuitry | — | 2012-02-28 |
| 8122310 | Input buffer, test switches and switch control with serial I/O | — | 2012-02-21 |