Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10128145 | Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using CMOS wells | Amitava Chatterjee | 2018-11-13 |
| 9966373 | MOS transistor structure and method of forming the structure with vertically and horizontally-elongated metal contacts | Russell Carlton McMullan | 2018-05-08 |
| 9583609 | MOS transistor structure and method of forming the structure with vertically and horizontally-elongated metal contacts | Russell Carlton McMullan | 2017-02-28 |
| 9543374 | Low temperature coefficient resistor in CMOS flow | Greg Baldwin, Sarah Liu, Song Zhao | 2017-01-10 |
| 9508708 | Poly resistor for metal gate integrated circuits | — | 2016-11-29 |
| 8940598 | Low temperature coefficient resistor in CMOS flow | Greg Baldwin, Sarah Liu, Song Zhao | 2015-01-27 |
| 8940612 | Poly resistor for metal gate integrated circuits | — | 2015-01-27 |
| 8753941 | High performance asymmetric cascoded transistor | Vijay Reddy, Samuel Suresh Martin, T Krishnaswamy | 2014-06-17 |
| 8716827 | Diffusion resistor with reduced voltage coefficient of resistance and increased breakdown voltage using CMOS wells | Amitava Chatterjee | 2014-05-06 |
| 8609483 | Method of building compensated isolated P-well devices | Greg Baldwin | 2013-12-17 |
| 8604543 | Compensated isolated p-well DENMOS devices | Greg Baldwin, Vineet Mishra, Ananth Kamath | 2013-12-10 |
| 8405154 | Low cost transistors using gate orientation and optimized implants | Greg Baldwin, Shaofeng Yu, Shashank S. Ekbote | 2013-03-26 |
| 8294243 | Lateral bipolar transistor with compensated well regions | — | 2012-10-23 |
| 8232158 | Compensated isolated p-well DENMOS devices | Greg Baldwin, Vineet Mishra, Ananth Kamath | 2012-07-31 |
| 8134204 | DEMOS transistors with STI and compensated well in drain | Hisashi Shichijo | 2012-03-13 |
| 8114729 | Differential poly doping and circuits therefrom | Shashank S. Ekbote, Greg Baldwin, Borna J. Obradovic | 2012-02-14 |
| 7994009 | Low cost transistors using gate orientation and optimized implants | Greg Baldwin, Shaofeng Yu, Shashank S. Ekbote | 2011-08-09 |
| 7829405 | Lateral bipolar transistor with compensated well regions | — | 2010-11-09 |
| 7053465 | Semiconductor varactor with reduced parasitic resistance | Chi-Cheong Shen | 2006-05-30 |
| 6847095 | Variable reactor (varactor) with engineered capacitance-voltage characteristics | Abdellatif Bellaouar | 2005-01-25 |
| 6548337 | Method of manufacturing a high gain bipolar junction transistor with counterdoped base in CMOS technology | Chi-Cheong Shen, David B. Spratt, Michael D. Aragon | 2003-04-15 |