Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
IR

Iain Robertson

TITexas Instruments: 48 patents #154 of 12,488Top 2%
ULUltrasoc Technologies Limited: 8 patents #2 of 10Top 20%
SSSiemens Industry Software: 7 patents #8 of 391Top 3%
MGMentor Graphics: 2 patents #191 of 698Top 30%
Oracle: 1 patents #8,282 of 14,854Top 60%
Cople, GB: #1 of 2 inventorsTop 50%
Overall (All Time): #31,785 of 4,157,543Top 1%
67 Patents All Time

Issued Patents All Time

Showing 26–50 of 67 patents

Patent #TitleCo-InventorsDate
7047284 Transfer request bus node for transfer controller with hub and ports Sanjive Agarwala, David A. Comisky, Charles Fuoco, David Hoyle, John D. Keay +3 more 2006-05-16
7027447 Communications interface between clock domains with minimal latency Andre Szczepanek, Denis Beaudoin 2006-04-11
6954468 Write allocation counter for transfer controller with hub and ports Sanjive Agarwala, David A. Comisky, Charles Fuoco 2005-10-11
6904474 Using write request queue to prevent bottlenecking on slow ports in transfer controller with hub and ports architecture 2005-06-07
6892253 Maintaining remote queue using two counters in transfer controller with hub and ports 2005-05-10
6868087 Request queue manager in transfer controller with hub and ports Sanjive Agarwala, David A. Comisky, Charles Fuoco, Christopher L. Mobley 2005-03-15
6839831 Data processing apparatus with register file bypass Keith Balmer, Richard Simpson, John D. Keay 2005-01-04
6741611 Packet memory management (PACMAN) scheme Andre Szczepanek 2004-05-25
6690668 Modular interconnection of network switches Andre Szczepanek, Denis Beaudoin 2004-02-10
6681270 Effective channel priority processing for transfer controller with hub and ports Sanjive Agarwala, David A. Comisky 2004-01-20
6658503 Parallel transfer size calculation and annulment determination in transfer controller with hub and ports Sanjive Agarwala, David A. Comisky 2003-12-02
6654819 External direct memory access processor interface to centralized transaction processor David A. Comisky, Sanjive Agarwala 2003-11-25
6654834 Method and apparatus for data transfer employing closed loop of memory nodes John D. Keay, Amarjit S. Bhandal, Keith Balmer 2003-11-25
6651083 Distributed service request system for providing fair arbitration using token passing scheme to resolve collisions Amarjit S. Bhandal, John D. Keay 2003-11-18
6621818 Ring configuration for network switches Andre Szczepanek, Denis Beaudoin 2003-09-16
6614276 Flip-flop design Richard Simpson 2003-09-02
6574683 External direct memory access processor implementation that includes a plurality of priority levels stored in request queue David A. Comisky 2003-06-03
6496740 Transfer controller with hub and ports architecture David Hoyle 2002-12-17
6493818 Technique for pipelining synchronization to maintain throughput across two asynchronous clock domain boundaries 2002-12-10
6378032 Bank conflict avoidance in multi-bank DRAMS with shared sense amplifiers 2002-04-23
6314047 Low cost alternative to large dual port RAM John D. Keay, Karl M. Guttag, Keith Balmer 2001-11-06
6189077 Two computer access circuit using address translation into common register file Jeffrey L. Nye, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton 2001-02-13
6185629 Data transfer controller employing differing memory interface protocols dependent upon external input at predetermined time Richard Simpson, Keith Balmer 2001-02-06
6154824 Multifunctional access devices, systems and methods Jeffrey L. Nye, Michael D. Asal, Graham B. Short, Richard Simpson, James G. Littleton 2000-11-28
6038622 Peripheral access with synchronization feature Gary L. Swoboda 2000-03-14