Issued Patents All Time
Showing 25 most recent of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE44190 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 2013-04-30 |
| 7389317 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 2008-06-17 |
| 7047284 | Transfer request bus node for transfer controller with hub and ports | Sanjive Agarwala, David A. Comisky, Charles Fuoco, Iain Robertson, David Hoyle +3 more | 2006-05-16 |
| 7039795 | System and method for using a two-stage multiplexing architecture for performing combinations of passing, rearranging, and duplicating operations on data | Karl M. Guttag, Amarjit S. Bhandal | 2006-05-02 |
| 6948050 | Single integrated circuit embodying a dual heterogenous processors with separate instruction handling hardware | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 2005-09-20 |
| 6839831 | Data processing apparatus with register file bypass | Richard Simpson, Iain Robertson, John D. Keay | 2005-01-04 |
| 6829696 | Data processing system with register store/load utilizing data packing/unpacking | Karl M. Guttag, Lewis Nardini | 2004-12-07 |
| 6757775 | Batch method for accessing IDE device task registers | — | 2004-06-29 |
| 6754809 | Data processing apparatus with indirect register file access | Karl M. Guttag, David Hoyle | 2004-06-22 |
| 6745319 | Microprocessor with instructions for shuffling and dealing data | David Hoyle, Lewis Nardini | 2004-06-01 |
| 6711602 | Data processor with flexible multiply unit | Amarjit S. Bhandal, David Hoyle, Karl M. Guttag, Zahid Hussain | 2004-03-23 |
| 6654834 | Method and apparatus for data transfer employing closed loop of memory nodes | Iain Robertson, John D. Keay, Amarjit S. Bhandal | 2003-11-25 |
| 6370558 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 2002-04-09 |
| 6314047 | Low cost alternative to large dual port RAM | John D. Keay, Iain Robertson, Karl M. Guttag | 2001-11-06 |
| 6260088 | Single integrated circuit embodying a risc processor and a digital signal processor | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 2001-07-10 |
| 6240437 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 2001-05-29 |
| 6185629 | Data transfer controller employing differing memory interface protocols dependent upon external input at predetermined time | Richard Simpson, Iain Robertson | 2001-02-06 |
| 6173394 | Instruction having bit field designating status bits protected from modification corresponding to arithmetic logic unit result | Karl M. Guttag, Sydney W. Poland | 2001-01-09 |
| 6116768 | Three input arithmetic logic unit with barrel rotator | Karl M. Guttag, Robert J. Gove, Christopher Jensen Read, Jeremiah E. Golston, Sydney W. Poland +2 more | 2000-09-12 |
| 6098163 | Three input arithmetic logic unit with shifter | Karl M. Guttag, Robert J. Gove, Christopher Jensen Read, Jeremiah E. Golston, Sydney W. Poland +2 more | 2000-08-01 |
| 6070003 | System and method of memory access in apparatus having plural processors and plural memories | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 2000-05-30 |
| 6067613 | Rotation register for orthogonal data transformation | — | 2000-05-23 |
| 6058473 | Memory store from a register pair conditional upon a selected status bit | Karl M. Guttag, Sydney W. Poland | 2000-05-02 |
| 6038584 | Synchronized MIMD multi-processing system and method of operation | — | 2000-03-14 |
| 6032170 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 2000-02-29 |