Issued Patents All Time
Showing 51–70 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5606520 | Address generator with controllable modulo power of two addressing capability | Robert J. Gove, Karl M. Guttag, Nicholas Ing-Simmons | 1997-02-25 |
| 5606677 | Packed word pair multiply operation forming output including most significant bits of product and other bits of one input | Christopher Jensen Read | 1997-02-25 |
| 5603049 | Bus system servicing plural module requestors with module access identification known to system user | — | 1997-02-11 |
| 5600847 | Three input arithmetic logic unit with mask generator | Karl M. Guttag, Robert J. Gove, Christopher Jensen Read, Jeremiah E. Golston, Sydney W. Poland +2 more | 1997-02-04 |
| 5592405 | Multiple operations employing divided arithmetic logic unit and multiple flags register | Robert J. Gove, Karl M. Guttag, Nicholas Ing-Simmons | 1997-01-07 |
| 5590350 | Three input arithmetic logic unit with mask generator | Karl M. Guttag, Robert J. Gove, Christopher Jensen Read, Jeremiah E. Golston, Sydney W. Poland +2 more | 1996-12-31 |
| 5524265 | Architecture of transfer processor | Robert J. Gove, Iain Robertson, Karl M. Guttag, Nicholas Ing-Simmons | 1996-06-04 |
| 5522083 | Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 1996-05-28 |
| 5509129 | Long instruction word controlling plural independent processor operations | Karl M. Guttag, Christopher Jensen Read | 1996-04-16 |
| 5504911 | Bus system servicing plural module requestors with module access identification | — | 1996-04-02 |
| 5487146 | Plural memory access address generation employing guide table entries forming linked list | Karl M. Guttag, Sydney W. Poland, Robert J. Gove, Christopher Jensen Read | 1996-01-23 |
| 5471592 | Multi-processor with crossbar link of processors and memories and method of operation | Robert J. Gove, Karl M. Guttag, Nicholas Ing-Simmons | 1995-11-28 |
| 5398233 | Method of resetting coupled modules and system using the method | Iain Robertson | 1995-03-14 |
| 5371896 | Multi-processor having control over synchronization of processors in mind mode and method of operation | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 1994-12-06 |
| 5339447 | Ones counting circuit, utilizing a matrix of interconnected half-adders, for counting the number of ones in a binary string of image data | — | 1994-08-16 |
| 5239654 | Dual mode SIMD/MIMD processor providing reuse of MIMD instruction memories as data memories when operating in SIMD mode | Nicholas Ing-Simmons, Karl M. Guttag, Robert J. Gove | 1993-08-24 |
| 5226125 | Switch matrix having integrated crosspoint logic and method of operation | Nicholas Ing-Simmons, Karl M. Guttag, Robert J. Gove | 1993-07-06 |
| 5212777 | Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation | Robert J. Gove, Nicholas Ing-Simmons, Karl M. Guttag | 1993-05-18 |
| 5197140 | Sliced addressing multi-processor and method of operation | — | 1993-03-23 |
| 4956850 | Digital electronic system | — | 1990-09-11 |