Issued Patents All Time
Showing 26–50 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11960892 | Conditional execution specification of instructions using conditional extension slots in the same execute packet in a VLIW processor | Timothy David Anderson, Joseph Zbiciak | 2024-04-16 |
| 11960891 | Look-up table write | Naveen Bhoria, Dheera Balasubramanian Samudrala | 2024-04-16 |
| 11922166 | Vector SIMD VLIW data path architecture | Timothy David Anderson, Mujibur Rahman, Joseph Zbiciak, Eric Biscondi, Peter Richard Dent +2 more | 2024-03-05 |
| 11900112 | Vector reverse | Timothy David Anderson | 2024-02-13 |
| 11836494 | System and method for addressing data in memory | Timothy David Anderson, Joseph Zbiciak, Kai Chirca | 2023-12-05 |
| 11803382 | Look-up table read | Naveen Bhoria, Dheera Balasubramanian Samudrala, Rama Venkatasubramanian | 2023-10-31 |
| 11804858 | Butterfly network on load data return | Dheera Balasubramanian, Joseph Zbiciak, Timothy David Anderson | 2023-10-31 |
| 11803379 | Vector floating-point classification | Joseph Zbiciak, Brett L. Huber | 2023-10-31 |
| 11789742 | Pipeline protection for CPUs with save and restore of intermediate results | Timothy David Anderson, Joseph Zbiciak, Reid E. Tatge | 2023-10-17 |
| 11782718 | Implied fence on stream open | Naveen Bhoria, Kai Chirca, Timothy David Anderson, Abhijeet Ashok Chachad, Son Hung Tran | 2023-10-10 |
| 11775302 | Histogram operation | Naveen Bhoria, Rama Venkatasubramanian, Dheera Balasubramanian Samudrala, Alan L. Davis | 2023-10-03 |
| 11755322 | Vector load and duplicate operations | Timothy David Anderson, Peter Richard Dent | 2023-09-12 |
| 11748270 | Tracking streaming engine vector predicates to control processor execution | Joseph Zbiciak | 2023-09-05 |
| 11709677 | Look-up table initialize | Naveen Bhoria, Dheera Balasubramanian Samudrala, Rama Venkatasubramanian | 2023-07-25 |
| 11704046 | Quick clearing of registers | Timothy David Anderson, Soujanya Narnur | 2023-07-18 |
| 11681532 | Method for forming constant extensions in the same execute packet in a VLIW processor | Timothy David Anderson, Joseph Zbiciak | 2023-06-20 |
| 11669463 | Method and apparatus for permuting streamed data elements | Soujanya Narnur, Timothy David Anderson, Mujibur Rahman | 2023-06-06 |
| 11614940 | Vector maximum and minimum with indexing | Peter Richard Dent, Timothy David Anderson | 2023-03-28 |
| 11604648 | Vector bit transpose | Joseph Zbiciak, Dheera Balasubramanian Samudrala | 2023-03-14 |
| 11604652 | Streaming address generation | Timothy David Anderson, Joseph Zbiciak, Sahithi KRISHNA, Soujanya Narnur | 2023-03-14 |
| 11573847 | Streaming engine with deferred exception reporting | Joseph Zbiciak, Timothy David Anderson, Kai Chirca | 2023-02-07 |
| 11556338 | Vector SIMD VLIW data path architecture | Timothy David Anderson, Mujibur Rahman, Joseph Zbiciak, Eric Biscondi, Peter Richard Dent +2 more | 2023-01-17 |
| 11550573 | System and method to control the number of active vector lanes in a processor | Timothy David Anderson | 2023-01-10 |
| 11507520 | Tracking streaming engine vector predicates to control processor execution | Joseph Zbiciak | 2022-11-22 |
| 11467832 | Vector floating-point classification | Joseph Zbiciak, Brett L. Huber | 2022-10-11 |