Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12283332 | Memory BIST circuit and method | — | 2025-04-22 |
| 12259789 | Non-volatile memory compression for memory repair | Ramakrishnan Venkatasubramanian, Varun Singh | 2025-03-25 |
| 12243603 | At-speed test of functional memory interface logic in devices | Lei Wu | 2025-03-04 |
| 12217102 | Distributed mechanism for fine-grained test power control | Varun Singh, Jose Luis Flores, Rejitha Nair, David Matthew Thompson | 2025-02-04 |
| 12147697 | Methods and apparatus to characterize memory | — | 2024-11-19 |
| 12085610 | Methods and apparatus to identify faults in processors | Benjamin Niewenhuis | 2024-09-10 |
| 12033711 | Built-in memory repair with repair code compression | Varun Singh | 2024-07-09 |
| 12009045 | Management of multiple memory in-field self-repair options | Varun Singh | 2024-06-11 |
| 11881275 | Screening of memory circuits | Francisco A. Cano, Anthony M. Hill | 2024-01-23 |
| 11748202 | Non-volatile memory compression for memory repair | Ramakrishnan Venkatasubramanian, Varun Singh | 2023-09-05 |
| 11631472 | Built-in memory repair with repair code compression | Varun Singh | 2023-04-18 |
| 11568951 | Screening of memory circuits | Francisco A. Cano, Anthony M. Hill | 2023-01-31 |
| 11436090 | Non-volatile memory compression for memory repair | Ramakrishnan Venkatasubramanian, Varun Singh | 2022-09-06 |
| 11373726 | Management of multiple memory in-field self-repair options | Varun Singh | 2022-06-28 |
| 11087857 | Enabling high at-speed test coverage of functional memory interface logic by selective usage of test paths | Lei Wu | 2021-08-10 |
| 10600495 | Parallel memory self-testing | Sumant Dinkar Kale | 2020-03-24 |
| 10134483 | Centralized built-in soft-repair architecture for integrated circuits with embedded memories | Sumant Dinkar Kale | 2018-11-20 |
| 9852810 | Optimizing fuseROM usage for memory repair | Harsharaj Ellur | 2017-12-26 |
| 9698779 | Reconfiguring an ASIC at runtime | Karthik Srinivasan, Neel Talakshi Gala | 2017-07-04 |
| 9318222 | Hierarchical, distributed built-in self-repair solution | Raghavendra Prasad KS, Harsharaj Ellur | 2016-04-19 |
| 9053799 | Optimizing fuseROM usage for memory repair | Harsharaj Ellur | 2015-06-09 |
| 8051347 | Scan-enabled method and system for testing a system-on-chip | Bindu Dibbur Narasingarao, Viraj Narendra Patil | 2011-11-01 |
| 7555687 | Sequential scan technique for testing integrated circuits with reduced power, time and/or cost | Senthil Arasu Thirunavukarasu | 2009-06-30 |
| 7380184 | Sequential scan technique providing enhanced fault coverage in an integrated circuit | — | 2008-05-27 |
| 7277803 | Efficient calculation of a number of transitions and estimation of power dissipation in sequential scan tests | Senthil Arasu Thirunavukarasu | 2007-10-02 |