Issued Patents All Time
Showing 26–30 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6594713 | Hub interface unit and application unit interfaces for expanded direct memory access processor | David A. Comisky, Sanjive Agarwala, Raguram Damodaran | 2003-07-15 |
| 6535958 | Multilevel cache system coherence with memory selectively configured as cache or direct access memory and direct memory access | Sanjive Agarwala, David A. Comisky, Timothy David Anderson, Christopher L. Mobley | 2003-03-18 |
| 6484237 | Unified multilevel memory system architecture which supports both cache and addressable SRAM | Sanjive Agarwala, David A. Comisky, Timothy David Anderson | 2002-11-19 |
| 6446241 | Automated method for testing cache | Christopher L. Mobley, Timothy David Anderson, Sanjive Agarwala | 2002-09-03 |
| 6408345 | Superscalar memory transfer controller in multilevel memory organization | Sanjive Agarwala, David A. Comisky, Christopher L. Mobley | 2002-06-18 |