Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5864703 | Method for providing extended precision in SIMD vector arithmetic operations | Timothy J. Van Hook, Peter Hsu, William A. Huffman, Henry Packard Moreton | 1999-01-26 |
| 5696958 | Method and apparatus for reducing delays following the execution of a branch instruction in an instruction pipeline | Todd C. Mowry | 1997-12-09 |
| 5574877 | TLB with two physical pages per virtual tag | Ashish B. Dixit | 1996-11-12 |
| 5572713 | System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders | Larry B. Weber, Mark Himelstein | 1996-11-05 |
| 5568630 | Backward-compatible computer architecture with extended word size and address space | Thomas J. Riordan, Danny L. Freitas, Ashish B. Dixit, John L. Hennessy | 1996-10-22 |
| 5479630 | Hybrid cache having physical-cache and virtual-cache characteristics and method for accessing same | — | 1995-12-26 |
| 5420992 | Backward-compatible computer architecture with extended word size and address space | Thomas J. Riordan, Danny L. Freitas, Ashish B. Dixit, John L. Hennessy | 1995-05-30 |
| 5398328 | System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders | Larry B. Weber, Mark Himelstein | 1995-03-14 |
| 5027270 | Processor controlled interface with instruction streaming | Thomas J. Riordan, Paul S. Ries, Edwin Lyle Hudson | 1991-06-25 |