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Ultra-low supply-voltage static random-access memory (SRAM) with 8-transistor cell with P and N pass gates to same bit lines |
Sinan Doluca |
2021-11-09 |
| 10650404 |
Real-time bidding through placebo-based experimentation |
Narayan Kinhal, John Hughes, Jason Lopatecki, Darren Sue, Christopher Bell +1 more |
2020-05-12 |
| 8410717 |
Apparatus, method and system for providing AC line power to lighting devices |
Anatoly Shteynberg, Dongsheng Zhou, Harry Rodriguez, Mark Eason, Bradley M. Lehman +1 more |
2013-04-02 |
| 8324840 |
Apparatus, method and system for providing AC line power to lighting devices |
Anatoly Shteynberg, Dongsheng Zhou, Harry Rodriguez, Mark Eason, Bradley M. Lehman +1 more |
2012-12-04 |
| 5978926 |
Processor chip for using an external clock to generate an internal clock and for using data transmit patterns in combination with the internal clock to control transmission of data words to an external memory |
Paul S. Ries, John R. Kinsel, Albert M. Thaik |
1999-11-02 |
| 5953748 |
Processor with an efficient translation lookaside buffer which uses previous address computation results |
— |
1999-09-14 |
| 5734877 |
Processor chip having on-chip circuitry for generating a programmable external clock signal and for controlling data patterns |
Paul S. Ries, John R. Kinsel, Albert M. Thaik |
1998-03-31 |
| 5606683 |
Structure and method for virtual-to-physical address translation in a translation lookaside buffer |
— |
1997-02-25 |
| 5590294 |
Method and apparatus for retarting pipeline processing |
Sunil Mirapuri |
1996-12-31 |
| 5568630 |
Backward-compatible computer architecture with extended word size and address space |
Earl A. Killian, Danny L. Freitas, Ashish B. Dixit, John L. Hennessy |
1996-10-22 |
| 5420992 |
Backward-compatible computer architecture with extended word size and address space |
Earl A. Killian, Danny L. Freitas, Ashish B. Dixit, John L. Hennessy |
1995-05-30 |
| 5317601 |
Clock distribution system for an integrated circuit device |
Albert M. Thaik, Hai Ngoc Nguyen |
1994-05-31 |
| 5263140 |
Variable page size per entry translation look-aside buffer |
— |
1993-11-16 |
| 5027270 |
Processor controlled interface with instruction streaming |
Paul S. Ries, Edwin Lyle Hudson, Earl A. Killian |
1991-06-25 |
| 4959779 |
Dual byte order computer architecture a functional unit for handling data sets with differnt byte orders |
Larry B. Weber, Craig Hansen, Steven PRZYBYLSKI |
1990-09-25 |
| 4814976 |
RISC computer with unaligned reference handling and method for the same |
Craig Hansen |
1989-03-21 |
| 4336018 |
Electro-optic infantry weapons trainer |
Albert H. Marshall, Bon F. Shaw, Herbert C. Towle, George Siragusa |
1982-06-22 |
