Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5572713 | System and method for obtaining correct byte addresses by using logical operations on 2 least significant bits of byte address to facilitate compatibility between computer architectures having different memory orders | Earl A. Killian, Mark Himelstein | 1996-11-05 |
| 5398328 | System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders | Earl A. Killian, Mark Himelstein | 1995-03-14 |
| 4959779 | Dual byte order computer architecture a functional unit for handling data sets with differnt byte orders | Craig Hansen, Thomas J. Riordan, Steven PRZYBYLSKI | 1990-09-25 |