Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11888049 | Dielectric isolation structure for multi-gate transistors | Jen-Hong Chang, Chung-Ting Ko, Kuo-Yi Chao, Chia-Cheng Chao, You-Ting Lin +4 more | 2024-01-30 |
| 11862709 | Inner spacer structure and methods of forming such | Che-Lun Chang, Jiun-Ming Kuo, Ji-Yin Tsai | 2024-01-02 |
| 11854819 | Germanium hump reduction | Shih-Hao Fu, Hung-Ju Chou, Che-Lun Chang, Jiun-Ming Kuo, Sung-En Lin +2 more | 2023-12-26 |
| 11855220 | Method and structure for air gap inner spacer in gate-all-around devices | Shih-Chiang Chen, Wei-Yang Lee, Chia-Pin Lin | 2023-12-26 |
| 11848241 | Semiconductor structure and related methods | Hung-Jiu Chou, Jiun-Ming Kuo | 2023-12-19 |
| 11799002 | Semiconductor devices and methods of forming the same | Yen-Po Lin, Wei-Yang Lee, Chia-Pin Lin, Jiun-Ming Kuo | 2023-10-24 |
| 11764277 | Semiconductor structure and method for manufacturing the same | Yu-Fan Peng, Yu-Bey Wu, Yu-Shan Lu, Ying-Yan Chen, Yi-Cheng Li +1 more | 2023-09-19 |
| 11735665 | Dielectric fin structure | Yu-Shan Lu, Chung-I Yang, Kuo-Yi Chao, Wen-Hsing Hsieh, Jiun-Ming Kuo +1 more | 2023-08-22 |
| 11631745 | Semiconductor device structure with uneven gate profile | Chi-Sheng Lai, Yu-Fan Peng, Li Chen, Yu-Shan Lu, Yu-Bey Wu +6 more | 2023-04-18 |
| 11532733 | Dielectric isolation structure for multi-gate transistors | Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao +4 more | 2022-12-20 |
| 11450559 | Integrated circuit structure with backside dielectric layer having air gap | Che-Lun Chang, Wei-Yang Lee, Chia-Pin Lin | 2022-09-20 |
| 11437245 | Germanium hump reduction | Shih-Hao Fu, Hung-Ju Chou, Che-Lun Chang, Jiun-Ming Kuo, Sung-En Lin +2 more | 2022-09-06 |
| 11417767 | Semiconductor devices including backside vias and methods of forming the same | Che-Lun Chang, Wei-Yang Lee, Chia-Pin Lin | 2022-08-16 |
| 11404576 | Dielectric fin structure | Yu-Shan Lu, Chung-I Yang, Kuo-Yi Chao, Wen-Hsing Hsieh, Jiun-Ming Kuo +1 more | 2022-08-02 |
| 11374128 | Method and structure for air gap inner spacer in gate-all-around devices | Shih-Chiang Chen, Wei-Yang Lee, Chia-Pin Lin | 2022-06-28 |
| 11328959 | Semiconductor structure and related methods | Hung-Jiu Chou, Jiun-Ming Kuo | 2022-05-10 |
| 11232988 | Wavy profile mitigation | Shu-Wen Shen, You-Ting Lin, Jiun-Ming Kuo, Yi-Cheng Li, Pin-Ju Liang +1 more | 2022-01-25 |
| 9349657 | Fabrication methods of integrated semiconductor structure | Sheng-Hsiung Wang, Hsien-Chin Lin, Chia-Pin Lin, Fan-Yi Hsu, Ya-Jou Hsieh | 2016-05-24 |
| 9263578 | Semiconductor substructure having elevated strain material-sidewall interface and method of making the same | Wei-Yang Lee, Chun Hsiung Tsai | 2016-02-16 |
| 9224737 | Dual epitaxial process for a finFET device | Hung-Kai Chen, Hsien-Hsin Lin, Chia-Pin Lin, Chien-Tai Chan | 2015-12-29 |
| 9029912 | Semiconductor substructure having elevated strain material-sidewall interface and method of making the same | Wei-Yang Lee, Chun Hsiung Tsai | 2015-05-12 |
| 8937353 | Dual epitaxial process for a finFET device | Hung-Kai Chen, Hsien-Hsin Lin, Chia-Pin Lin, Chien-Tai Chan | 2015-01-20 |
| 8404538 | Device with self aligned stressor and method of making same | Kao-Ting Lai, Da-Wen Lin, Hsien-Hsin Lin, Chi-Hsi Wu | 2013-03-26 |
| 8372719 | Hard mask removal for semiconductor devices | Sheng-Hsiung Wang, Fu-Kai Yang, Chi-Cheng Hung | 2013-02-12 |
| 7663237 | Butted contact structure | Chloe Chen, David Hsu-Wei Lwu, Shyue-Shyh Lin, Wei-Ming Chen | 2010-02-16 |