Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11289645 | Method to integrate MRAM devices to the interconnects of 30nm and beyond CMOS technologies | Vignesh Sundar, Dongna Shen, Sahil Patel, Ru-Ying Tong, Yu-Jen Wang | 2022-03-29 |
| 11248824 | Control system and control method for frostless, multivariable coupling, and heat pump-based hot blast stove | Yujun Wang, Xiaojie Ma, Ying Wang, Tianshu Wang | 2022-02-15 |
| 11217746 | Ion beam etching fabricated sub 30nm Vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Dongna Shen, Zhongjian Teng, Jesmin Haq, Yu-Jen Wang | 2022-01-04 |
| 11145809 | Multiple spacer assisted physical etching of sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2021-10-12 |
| 11137178 | Cold energy recovery-type variable-capacity air-source heat pump system | Yunyun Wu, Yujun Wang, Ying Wang, Junhong Li, Tianshu Wang | 2021-10-05 |
| 11121314 | Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2021-09-14 |
| 11088320 | Fabrication of large height top metal electrode for sub-60nm magnetoresistive random access memory (MRAM) devices | Zhongjian Teng, Jesmin Haq, Yu-Jen Wang | 2021-08-10 |
| 11088321 | Highly selective ion beam etch hard mask for sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2021-08-10 |
| 11081642 | MTJ CD variation by HM trimming | Dongna Shen, Jesmin Haq, Yu-Jen Wang | 2021-08-03 |
| 11043632 | Ion beam etching process design to minimize sidewall re-deposition | Vignesh Sundar, Guenole Jan, Dongna Shen, Yu-Jen Wang | 2021-06-22 |
| 11031548 | Reduce intermixing on MTJ sidewall by oxidation | Dongna Shen, Sahil Patel, Vignesh Sundar, Yu-Jen Wang | 2021-06-08 |
| 11024797 | Under-cut via electrode for sub 60 nm etchless MRAM devices by decoupling the via etch process | Dongna Shen, Yu-Jen Wang | 2021-06-01 |
| 10964887 | Highly physical ion resistive spacer to define chemical damage free sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2021-03-30 |
| 10944049 | MTJ device performance by controlling device shape | Jesmin Haq, Tom Zhong, Zhongjian Teng, Vinh Lam | 2021-03-09 |
| 10921707 | Self-adaptive halogen treatment to improve photoresist pattern and magnetoresistive random access memory (MRAM) device uniformity | Dongna Shen, Jesmin Haq, Yu-Jen Wang | 2021-02-16 |
| 10886461 | Highly physical etch resistive photoresist mask to define large height sub 30nm via and metal hard mask for MRAM devices | Dongna Shen, Yu-Jen Wang | 2021-01-05 |
| 10868244 | Multiple hard mask patterning to fabricate 20nm and below MRAM devices | Yu-Jen Wang, Jesmin Haq, Tom Zhong | 2020-12-15 |
| 10868237 | Self-aligned encapsulation hard mask to separate physically under-etched MTJ cells to reduce conductive R-deposition | Dongna Shen, Vignesh Sundar, Yu-Jen Wang | 2020-12-15 |
| 10868242 | Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode | Dongna Shen, Yu-Jen Wang | 2020-12-15 |
| 10840440 | Metal/dielectric/metal hybrid hard mask to define ultra-large height top electrode for sub 60nm MRAM devices | Yu-Jen Wang | 2020-11-17 |
| 10770654 | Multiple spacer assisted physical etching of sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2020-09-08 |
| 10756137 | MTJ patterning without etch induced device degradation assisted by hard mask trimming | Dongna Shen, Yu-Jen Wang | 2020-08-25 |
| 10714680 | Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Dongna Shen, Yu-Jen Wang | 2020-07-14 |
| 10714679 | CMP stop layer and sacrifice layer for high yield small size MRAM devices | Zhongjian Teng, Yu-Jen Wang | 2020-07-14 |
| 10680168 | Ion beam etching fabricated sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices | Dongna Shen, Zhongjian Teng, Jesmin Haq, Yu-Jen Wang | 2020-06-09 |