Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11121255 | V-shape recess profile for embedded source/drain epitaxy | Chii-Horng Li, Chih-Shan Chen, Roger Tai, Yih-Ann Lin, Tzu-Ching Lin | 2021-09-14 |
| 11107923 | Source/drain regions of FinFET devices and methods of forming same | Kun-Mu Li, Heng-Wen Ting, Hsueh-Chang Sung | 2021-08-31 |
| 11075120 | FinFET device and method | Kun-Mu Li, Heng-Wen Ting, Hsueh-Chang Sung, Chien-Wei Lee | 2021-07-27 |
| 11063152 | Semiconductor device and method | Chien-Wei Lee, Hsueh-Chang Sung, Jyun-Chih Lin, Tzu-Hsiang Hsu, Feng-Cheng Yang | 2021-07-13 |
| 11004724 | FETS and methods of forming FETS | Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting +3 more | 2021-05-11 |
| 10991795 | Semiconductor device and manufacturing method thereof | Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su +1 more | 2021-04-27 |
| 10944005 | Interfacial layer between fin and source/drain region | Chih-Yun Chin, Chii-Horng Li, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting +5 more | 2021-03-09 |
| 10879355 | Profile design for improved device performance | Kun-Mu Li, Hsueh-Chang Sung | 2020-12-29 |
| 10854715 | Supportive layer in source/drains of FinFET devices | Jung-Chi Tai, Chii-Horng Li, Pei-Ren Jeng, Yan-Ting Lin, Chih-Yun Chin | 2020-12-01 |
| 10854748 | Semiconductor device having first and second epitaxial materials | Lilly Su, Pang-Yen Tsai, Tze-Liang Lee, Chii-Horng Li, Ming-Hua Yu | 2020-12-01 |
| 10763366 | V-shape recess profile for embedded source/drain epitaxy | Chii-Horng Li, Chih-Shan Chen, Roger Tai, Yih-Ann Lin, Tzu-Ching Lin | 2020-09-01 |
| 10749013 | Semiconductor device and method for fabricating the same | Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su +1 more | 2020-08-18 |
| 10651309 | V-shape recess profile for embedded source/drain epitaxy | Chii-Horng Li, Chih-Shan Chen, Roger Tai, Yih-Ann Lin, Tzu-Ching Lin | 2020-05-12 |
| 10483396 | Interfacial layer between fin and source/drain region | Chih-Yun Chin, Chii-Horng Li, Chien-Wei Lee, Hsueh-Chang Sung, Heng-Wen Ting +5 more | 2019-11-19 |
| 10468482 | Semiconductor device and manufacturing method thereof | Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Li-Li Su +1 more | 2019-11-05 |
| 10269618 | FETS and methods of forming FETS | Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting +3 more | 2019-04-23 |
| 10164097 | Semiconductor device and manufacturing method thereof | Chii-Horng Li, Heng-Wen Ting, Tzu-Hsiang Hsu, Chih-Yun Chin | 2018-12-25 |
| 10103249 | FinFET device and method for fabricating the same | Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su +1 more | 2018-10-16 |
| 10038095 | V-shape recess profile for embedded source/drain epitaxy | Chii-Horng Li, Chih-Shan Chen, Roger Tai, Yih-Ann Lin, Tzu-Ching Lin | 2018-07-31 |
| 9905641 | Semiconductor device and manufacturing method thereof | Chii-Horng Li, Chien-I Kuo, Heng-Wen Ting, Jung-Chi Tai, Lilly Su +1 more | 2018-02-27 |
| 9842930 | Semiconductor device and fabrication method thereof | Lilly Su, Pang-Yen Tsai, Tze-Liang Lee, Chii-Horng Li, Ming-Hua Yu | 2017-12-12 |
| 9831116 | FETS and methods of forming FETs | Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting +3 more | 2017-11-28 |
| 9728641 | Semiconductor device and fabrication method thereof | Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai, Lilly Su +2 more | 2017-08-08 |
| 9412868 | Semiconductor device and fabrication method thereof | Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai, Lilly Su +2 more | 2016-08-09 |
| 9401426 | Semiconductor device and fabrication method thereof | Lilly Su, Pang-Yen Tsai, Tze-Liang Lee, Chii-Horng Li, Ming-Hua Yu | 2016-07-26 |