Issued Patents All Time
Showing 76–100 of 105 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6194258 | Method of forming an image sensor cell and a CMOS logic circuit device | — | 2001-02-27 |
| 6165880 | Double spacer technology for making self-aligned contacts (SAC) on semiconductor integrated circuits | Dun-Nian Yaung, Li-Chih Chao, Kuo-Ching Huang | 2000-12-26 |
| 6136633 | Trench-free buried contact for locos isolation | Dun-Nian Yaung, Jin-Yuan Lee | 2000-10-24 |
| 6117722 | SRAM layout for relaxing mechanical stress in shallow trench isolation technology and method of manufacture thereof | Jin-Yuan Lee, Dun-Nian Yaung, Jeng-Han Lee | 2000-09-12 |
| 6071798 | Method for fabricating buried contacts | Dun-Nian Yaung, Jin-Yuan Lee, Jhon Jhy Liaw | 2000-06-06 |
| 6046103 | Borderless contact process for a salicide devices | Kong-Beng Thei, Ming Lei | 2000-04-04 |
| 6040227 | IPO deposited with low pressure O.sub.3 -TEOS for planarization in multi-poly memory technology | Lung Chen, Dun-Nian Yaung, Yi-Miaw Lin | 2000-03-21 |
| 6001731 | Isolation dielectric deposition in multi-polysilicon chemical-mechanical polishing process | Chung-Hui Su, Mong-Song Liang, Chen-Jong Wang | 1999-12-14 |
| 5998269 | Technology for high performance buried contact and tungsten polycide gate integration | Kuo-Ching Huang, Jenn Ming Huang, Dun-Nian Yaung | 1999-12-07 |
| 5926697 | Method of forming a moisture guard ring for integrated circuit applications | Dun-Nian Yaung, Jin-Yuan Lee, Hsien-Wei Chin | 1999-07-20 |
| 5867087 | Three dimensional polysilicon resistor for integrated circuits | Mong-Song Liang, Chen-Jong Wang, Chung-Hui Su | 1999-02-02 |
| 5834342 | Self-aligned silicidation of TFT source-drain region | Kan-Yuan Lee, Dun-Nian Yang | 1998-11-10 |
| 5796135 | Process to fabricate stacked capacitor dram and low power thin film transistor sram devices on a single semiconductor chip | Mong-Song Liang, Chen-Jong Wang, Chung-Hui Su | 1998-08-18 |
| 5796150 | High-performance and reliable thin film transistor (TFT) using plasma hydrogenation with a metal shield on the TFT channel | Kan-Yuan Lee, Mong-Song Liang | 1998-08-18 |
| 5731232 | Method for concurrently making thin-film-transistor (TFT) gate electrodes and ohmic contacts at P/N junctions for TFT-static random | Mong-Song Liang | 1998-03-24 |
| 5716881 | Process to fabricate stacked capacitor DRAM and low power thin film transistor SRAM devices on a single semiconductor chip | Mong-Song Liang, Chen-Jong Wang, Chung-Hui Su | 1998-02-10 |
| 5707895 | Thin film transistor performance enhancement by water plasma treatment | Cheng-Yeh Shih, Kan-Yuan Lee | 1998-01-13 |
| 5686335 | Method of making high-performance and reliable thin film transistor (TFT) using plasma hydrogenation with a metal shield on the TFT channel | Kan-Yuan Lee, Mong-Song Liang | 1997-11-11 |
| 5677557 | Method for forming buried plug contacts on semiconductor integrated circuits | Chen-Jong Wang, Mong-Song Liang, Chung-Hui Su | 1997-10-14 |
| 5674770 | Method of fabricating an SRAM device with a self-aligned thin film transistor structure | Jin-Yuan Lee | 1997-10-07 |
| 5668380 | Reduced area metal contact to a thin polysilicon layer contact structure having low ohmic resistance | Mong-Song Liang, Chung-Hui Su, Chen-Jong Wang | 1997-09-16 |
| 5652174 | Unified stacked contact process for static random access memory (SRAM) having polysilicon load resistors | Mong-Song Liang, Chung-Hui Su, Chen-Jong Wang | 1997-07-29 |
| 5607879 | Method for forming buried plug contacts on semiconductor integrated circuits | Chen-Jong Wang, Mong-Song Liang, Chung-Hui Su | 1997-03-04 |
| 5587696 | High resistance polysilicon resistor for integrated circuits and method of fabrication thereof | Chung-Hui Su, Mong-Song Liang, Chen-Jong Wang | 1996-12-24 |
| 5576243 | Process for forming stacked contacts and metal contacts on static random access memory having thin film transistors | Mong-Song Liang, Chung-Hui Su, Chen-Jong Wang | 1996-11-19 |