Issued Patents All Time
Showing 26–50 of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11038052 | Semiconductor arrangement with one or more semiconductor columns | Kuo-Cheng Ching, Ta-Pen Guo, Carlos H. Diaz | 2021-06-15 |
| 10985159 | Method for manufacturing monolithic three-dimensional (3D) integrated circuits | Carlos H. Diaz, Ta-Pen Guo | 2021-04-20 |
| 10964691 | Method for manufacturing monolithic three-dimensional (3D) integrated circuits | Carlos H. Diaz, Ta-Pen Guo | 2021-03-30 |
| 10943833 | Silicon and silicon germanium nanowire formation | Kuo-Cheng Chiang, Carlos H. Diaz | 2021-03-09 |
| 10872776 | Structure and formation method of semiconductor device structure | Carlos H. Diaz | 2020-12-22 |
| 10854735 | Method of forming transistor | Carlos H. Diaz | 2020-12-01 |
| 10854721 | Semiconductor device with silicide | Kuo-Cheng Ching, Ta-Pen Guo, Carlos H. Diaz | 2020-12-01 |
| 10847736 | Method of manufacturing a semiconductor device and a semiconductor device | Chun-Chieh Lu, Yu-Ming Lin, Ken-Ichi Goto, Zhiqiang Wu | 2020-11-24 |
| 10818780 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Carlos H. Diaz, Yee-Chia Yeo | 2020-10-27 |
| 10763198 | Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure | Ta-Pen Guo, Carlos H. Diaz, Yi-Hsiung Lin | 2020-09-01 |
| 10734503 | Asymmetric semiconductor device | Carlos H. Diaz, Yeh Hsu, Tsung-Hsing Yu, Chia-Wen Liu | 2020-08-04 |
| 10714601 | Fabrication of a transistor with a channel structure and semimetal source and drain regions | — | 2020-07-14 |
| 10714349 | Semiconductor device and manufacturing method thereof | Carlos H. Diaz | 2020-07-14 |
| 10705766 | 3D cross-bar nonvolatile memory | Carlos H. Diaz, Ta-Pen Guo | 2020-07-07 |
| 10699964 | Silicon and silicon germanium nanowire formation | Kuo-Cheng Ching, Carlos H. Diaz | 2020-06-30 |
| 10644168 | 2-D material transistor with vertical structure | Chung-Cheng Wu, Carlos H. Diaz, Chih-Hao Wang, Ken-Ichi Goto, Ta-Pen Guo +3 more | 2020-05-05 |
| 10559563 | Method for manufacturing monolithic three-dimensional (3D) integrated circuits | Carlos H. Diaz, Ta-Pen Guo | 2020-02-11 |
| 10529729 | Non-volatile memory device having nanocrystal floating gate and method of fabricating same | Carlos H. Diaz | 2020-01-07 |
| 10510744 | Vertical nanowire transistor for input/output structure | Ta-Pen Guo, Carlos H. Diaz | 2019-12-17 |
| 10497792 | Contacts for highly scaled transistors | Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Chun-Hsiung Lin +2 more | 2019-12-03 |
| 10461190 | Method for reducing contact resistance in semiconductor structures | Carlos H. Diaz | 2019-10-29 |
| 10461176 | FinFET device including a stem region of a fin element | Kuo-Cheng Ching, Zhiqiang Wu | 2019-10-29 |
| 10461179 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Carlos H. Diaz, Yee-Chia Yeo | 2019-10-29 |
| 10453522 | SRAM with stacked bit cells | Carlos H. Diaz, Chih-Hao Wang, Ta-Pen Guo | 2019-10-22 |
| 10361270 | Nanowire MOSFET with different silicides on source and drain | Cheng-Tung Lin, Kuo-Cheng Ching, Carlos H. Diaz | 2019-07-23 |