Issued Patents All Time
Showing 126–150 of 153 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10290550 | Strain enhancement for FinFETs | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan, Wei-Jen Lai | 2019-05-14 |
| 10290546 | Threshold voltage adjustment for a gate-all-around semiconductor structure | Szu-Wei Huang, Huan-Sheng Wei, Jon-Hsu Ho, Chih Chieh Yeh, Wen-Hsing Hsieh +2 more | 2019-05-14 |
| 10290548 | Semiconductor device structure with semiconductor wire | I-Sheng Chen, Tzu-Chiang Chen, Tung Ying Lee, Szu-Wei Huang, Huan-Sheng Wei | 2019-05-14 |
| 10269800 | Vertical gate semiconductor device with steep subthreshold slope | Szu-Wei Huang, Chih Chieh Yeh, Yee-Chia Yeo | 2019-04-23 |
| 10164042 | Semiconductor device and manufacturing method thereof | Yee-Chia Yeo, Jyh-Cherng Sheu, Sung-Li Wang, I-Sheng Chen, Chi On Chui | 2018-12-25 |
| 10164112 | Semiconductor device and manufacturing method thereof | I-Sheng Chen, Chi On Chui | 2018-12-25 |
| 10153280 | Replacement gate process for FinFET | Cheng-Yi Peng, Tsung-Yao Wen, Yee-Chia Yeo, Yen-Ming Chen | 2018-12-11 |
| 10141310 | Short channel effect suppression | Cheng-Yi Peng, Yu-Lin Yang, Chia-Cheng Ho, Wei-Jen Lai, Tzu-Chiang Chen +4 more | 2018-11-27 |
| 10134640 | Semiconductor device structure with semiconductor wire | I-Sheng Chen, Tzu-Chiang Chen, Chao-Ching Cheng, Chih Chieh Yeh, Yee-Chia Yeo | 2018-11-20 |
| 10121870 | Semiconductor device structure with strain-relaxed buffer | I-Sheng Chen, Tzu-Chiang Chen | 2018-11-06 |
| 10062782 | Method of manufacturing a semiconductor device with multilayered channel structure | Chao-Ching Cheng, Chih Chieh Yeh, Cheng-Hsien Wu, Jung-Piao Chiu, Tzu-Chiang Chen +3 more | 2018-08-28 |
| 10008603 | Multi-gate device and method of fabrication thereof | Huan-Sheng Wei, Chia-Wen Liu, Yi-Ming Sheu, Zhiqiang Wu, Chung-Cheng Wu +1 more | 2018-06-26 |
| 9997616 | Semiconductor device having a strained region | Feng Yuan, Chih Chieh Yeh, Tsung-Lin Lee | 2018-06-12 |
| 9972545 | System and method for a field-effect transistor with dual vertical gates | Chih Chieh Yeh, Cheng-Yi Peng, Tzu-Chiang Chen, Yee-Chia Yeo | 2018-05-15 |
| 9876117 | Structure and formation method of semiconductor device structure | Cheng-Yi Peng, Chih Chieh Yeh, Hung-Ming Chen, Yee-Chia Yeo | 2018-01-23 |
| 9859427 | Semiconductor Fin FET device with epitaxial source/drain | Cheng-Yi Peng, Jyh-Cherng Sheu, Yee-Chia Yeo | 2018-01-02 |
| 9853101 | Strained nanowire CMOS device and method of forming | Cheng-Yi Peng, Yu-Lin Yang, Chih Chieh Yeh, Yee-Chia Yeo, Chi-Wen Liu | 2017-12-26 |
| 9741829 | Semiconductor device and manufacturing method thereof | Cheng-Yi Peng, Chih Chieh Yeh, Chih-Sheng Chang, Hung-Ming Chen, Yee-Chia Yeo | 2017-08-22 |
| 9721829 | FinFETs with different fin height and EPI height setting | Wei-Jen Lai, Feng Yuan, Tsung-Lin Lee, Chih Chieh Yeh | 2017-08-01 |
| 9660025 | Structure and formation method of semiconductor device structure | Cheng-Yi Peng, Chih Chieh Yeh, Hung-Ming Chen, Yee-Chia Yeo | 2017-05-23 |
| 9627531 | Field-effect transistor with dual vertical gates | Chih Chieh Yeh, Cheng-Yi Peng, Tzu-Chiang Chen, Yee-Chia Yeo | 2017-04-18 |
| 9570580 | Replacement gate process for FinFET | Cheng-Yi Peng, Tsung-Yao Wen, Yee-Chia Yeo, Yen-Ming Chen | 2017-02-14 |
| 9472669 | Semiconductor Fin FET device with epitaxial source/drain | Cheng-Yi Peng, Jyh-Cherng Sheu, Yee-Chia Yeo | 2016-10-18 |
| 9419134 | Strain enhancement for FinFETs | Tsung-Lin Lee, Chih Chieh Yeh, Feng Yuan, Wei-Jen Lai | 2016-08-16 |
| 9263342 | Semiconductor device having a strained region | Tsung-Lin Lee, Feng Yuan, Chih Chieh Yeh | 2016-02-16 |