Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12243821 | Conductive line structures and method of forming same | Chi-Yeh Yu, Kuo-Nan Yang, Chung-Hsing Wang, Stefan Rusu, Chin-Shen Lin | 2025-03-04 |
| 12182488 | Semiconductor device including standard-cell-adapted power grid arrangement | Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang | 2024-12-31 |
| 12112117 | Method of manufacturing a semiconductor device including PG-aligned cells | Chung-Hsing Wang, Kuo-Nan Yang | 2024-10-08 |
| 12106030 | Method of forming merged pillar structures and method of generating layout diagram of same | Chung-Hsing Wang, Kuo-Nan Yang, Yi-Kan Cheng | 2024-10-01 |
| 12067337 | Power grid, IC and method for placing power grid | Kuo-Nan Yang, Chung-Hsing Wang | 2024-08-20 |
| 12019972 | Method and system of forming semiconductor device | Kuo-Nan Yang, Wan-Yu Lo, Chung-Hsing Wang | 2024-06-25 |
| 11935833 | Method of forming power grid structures | Chi-Yeh Yu, Kuo-Nan Yang, Chung-Hsing Wang, Stefan Rusu, Chin-Shen Lin | 2024-03-19 |
| 11908853 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen +3 more | 2024-02-20 |
| 11775725 | System and computer program product for integrated circuit design | Chin-Shen Lin, Kuo-Nan Yang, Chung-Hsing Wang | 2023-10-03 |
| 11727183 | Method of fabricating semiconductor device including standard-cell-adapted power grid arrangement | Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang | 2023-08-15 |
| 11669671 | Semiconductor device including PG-aligned cells and method of generating layout of same | Chung-Hsing Wang, Kuo-Nan Yang | 2023-06-06 |
| 11651136 | Method and system of forming semiconductor device | Kuo-Nan Yang, Wan-Yu Lo, Chung-Hsing Wang | 2023-05-16 |
| 11552068 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen +3 more | 2023-01-10 |
| 11347922 | Method of fabricating semiconductor device including standard-cell-adapted power grid arrangement | Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang | 2022-05-31 |
| 11251124 | Power grid structures and method of forming the same | Chi-Yeh Yu, Chung-Hsing Wang, Kuo-Nan Yang, Stefan Rusu, Chin-Shen Lin | 2022-02-15 |
| 11227093 | Method and system of forming semiconductor device | Kuo-Nan Yang, Wan-Yu Lo, Chung-Hsing Wang | 2022-01-18 |
| 11211327 | Via sizing for IR drop reduction | Chin-Shen Lin, Kuo-Nan Yang, Chung-Hsing Wang | 2021-12-28 |
| 11205032 | Integrated circuit design method, system and computer program product | Chin-Shen Lin, Chung-Hsing Wang, Kuo-Nan Yang | 2021-12-21 |
| 11157677 | Merged pillar structures and method of generating layout diagram of same | Chung-Hsing Wang, Kuo-Nan Yang, Yi-Kan Cheng | 2021-10-26 |
| 11087063 | Method of generating layout diagram including dummy pattern conversion and system of generating same | Ritesh Kumar, Chung-Hsing Wang, Kuo-Nan Yang, Shu-Yi Ying | 2021-08-10 |
| 11068638 | Power grid, IC and method for placing power grid | Kuo-Nan Yang, Chung-Hsing Wang | 2021-07-20 |
| 10977415 | Integrated device and method of forming the same | Kuo-Nan Yang, Chung-Hsing Wang, Meng-Xiang Lee | 2021-04-13 |
| 10964685 | Integrated circuit and method of generating integrated circuit layout | Fong-Yuan Chang, Kuo-Nan Yang, Chung-Hsing Wang, Lee-Chung Lu, Sheng-Fong Chen +3 more | 2021-03-30 |
| 10943045 | Semiconductor device including standard-cell-adapted power grid arrangement and method for generating layout diagram of same | Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang | 2021-03-09 |
| 10936785 | Inter-cell leakage-reducing method of generating layout diagram and system for same | Chung-Hsing Wang, Kuo-Nan Yang, Jia Han LIN | 2021-03-02 |