DK

Di-Son Kuo

TSMC: 105 patents #240 of 12,232Top 2%
NP North American Philips: 1 patents #281 of 645Top 45%
PA Philips Electronics North America: 1 patents #328 of 725Top 50%
📍 New York, NY: #47 of 20,192 inventorsTop 1%
🗺 New York: #469 of 115,490 inventorsTop 1%
Overall (All Time): #12,500 of 4,157,543Top 1%
108
Patents All Time

Issued Patents All Time

Showing 51–75 of 108 patents

Patent #TitleCo-InventorsDate
6245685 Method for forming a square oxide structure or a square floating gate structure without rounding effect Hung-Cheng Sung, Chia-Ta Hsieh 2001-06-12
6242308 Method of forming poly tip to improve erasing and programming speed split gate flash Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung 2001-06-05
6229176 Split gate flash with step poly to improve program speed Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung, Chuang-Ke Yeh 2001-05-08
6228695 Method to fabricate split-gate with self-aligned source and self-aligned floating gate to control gate Chia-Ta Hsieh, Hung-Cheng Sung, Yai-Fen Lin, Jack Y. Yeh 2001-05-08
6214662 Forming self-align source line for memory array Hung-Cheng Sung, Chia-Ta Hsieh, Yai-Fen Lin 2001-04-10
6207515 Method of fabricating buried source to shrink chip size in memory array Chia-Ta Hsieh, Jenn Tsao, Yai-Fen Lin, Hung-Cheng Sung 2001-03-27
6207503 Method for shrinking array dimensions of split gate flash memory device using multilayer etching to define cell and source line Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung 2001-03-27
6204126 Method to fabricate a new structure with multi-self-aligned for split-gate flash Chia-Ta Hsieh, Tai-Fen Lin, Wen-Ting Chu, Chuang-Ke Yeh, Hung-Cheng Sung 2001-03-20
6190969 Method to fabricate a flash memory cell with a planar stacked gate Chrong-Jung Lin, Jong Chen, Hung-Der Su 2001-02-20
6188103 Method of forming sharp beak of poly by nitrogen implant to improve erase speed for split-gate flash Chia-Ta Hsieh, Hung-Cheng Sung, Yai-Fen Lin 2001-02-13
6180977 Self-aligned edge implanted cell to reduce leakage current and improve program speed in split-gate flash Yai-Fen Lin, Hung-Cheng Sung, Chia-Ta Hsieh 2001-01-30
6174772 Optimal process flow of fabricating nitride spacer without inter-poly oxide damage in split gate flash Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh 2001-01-16
6171906 Method of forming sharp beak of poly to improve erase speed in split gate flash Chia-Ta Hsieh, Hung-Cheng Sung, Yai-Fen Lin, Chuang-Ke Yeh 2001-01-09
6165845 Method to fabricate poly tip in split-gate flash Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh 2000-12-26
6159801 Method to increase coupling ratio of source to floating gate in split-gate flash Chia-Ta Hsieh, Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh 2000-12-12
6153494 Method to increase the coupling ratio of word line to floating gate by lateral coupling in stacked-gate flash Chia-Ta Hsieh, Yai-Fen Lin, Chrong-Jung Lin, Jong Chen, Hung-Der Su 2000-11-28
6133097 Method for forming mirror image split gate flash memory devices by forming a central source line slot Chia-Ta Hsieh, Chrong-Jung Lin, Shui-Hung Chen 2000-10-17
6133096 Process for simultaneously fabricating a stack gate flash memory cell and salicided periphereral devices Hung-Der Su, Jong Chen, Chrong-Jung Lin 2000-10-17
6130168 Using ONO as hard mask to reduce STI oxide loss on low voltage device in flash or EPROM process Wen-Ting Chu, Chrong-Jung Lin, Hung-Der Su, Jong Chen 2000-10-10
6130132 Clean process for manufacturing of split-gate flash memory device having floating gate electrode with sharp peak Chia-Ta Hsieh, Hung-Cheng Sung, Yai-Fen Lin 2000-10-10
6127229 Process of forming an EEPROM device having a split gate Wen-Ting Chu, Hung-Cheng Sung, Jack Y. Yeh, Chia-Ta Hsieh, Yai-Fen Lin 2000-10-03
6127227 Thin ONO thickness control and gradual gate oxidation suppression by b. N.su2 treatment in flash memory Chrong-Jung Lin, Jong Chen, Hung-Der Su 2000-10-03
6127226 Method for forming vertical channel flash memory cell using P/N junction isolation Chrong-Jung Lin, Jong Chen, Shui-Hung Chen 2000-10-03
6124609 Split gate flash memory with buried source to shrink cell dimension and increase coupling ratio Chia-Ta Hsieh, Jenn Tsao, Yai-Fen Lin, Hung-Cheng Sung 2000-09-26
6121088 Method of manufacture of undoped polysilicon as the floating-gate of a split-gate flash cell Yai-Fen Lin, Chia-Ta Hsieh, Hung-Cheng Sung, Juang-Ke Yeh 2000-09-19