Issued Patents All Time
Showing 126–150 of 298 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11848332 | Semiconductor device and manufacturing method thereof | Gao-Ming Wu, Katherine H. Chiang, Chien-Hao Huang | 2023-12-19 |
| 11843056 | Semiconductor structure and manufacturing method thereof | Neil Quinn Murray, Katherine H. Chiang | 2023-12-12 |
| 11837667 | Transistors with enhanced dopant profile and methods for forming the same | Min Dai, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin +1 more | 2023-12-05 |
| 11832450 | Embedded ferroelectric FinFET memory device | Bo-Feng Young, Sai-Hooi Yeong, Yu-Ming Lin, Sheng-Chih Lai, Chih-Yu Chang +1 more | 2023-11-28 |
| 11830922 | Semiconductor device with air-spacer | Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen | 2023-11-28 |
| 11818896 | Cocktail layer over gate dielectric layer of FET FeRAM | Rainer Yen-Chieh Huang, Hai-Ching Chen | 2023-11-14 |
| 11818882 | Vertical fuse memory in one-time program memory cells | Sheng-Chih Lai | 2023-11-14 |
| 11818894 | Semiconductor device and method of manufacturing the same | Chia-Yu Ling, Katherine H. Chiang | 2023-11-14 |
| 11810956 | In-situ thermal annealing of electrode to form seed layer for improving FeRAM performance | Yen-Chieh Huang, Po-Ting Lin, Song-Fu Liao, Hai-Ching Chen | 2023-11-07 |
| 11805658 | Magnetic random access memory and manufacturing method thereof | Hui-Hsien Wei, Han-Ting Tsai, Tai-Yen Peng, Yu-Teng Dai, Chien-Min Lee +2 more | 2023-10-31 |
| 11800718 | Semiconductor memory device with gate line passing through source/drain, channel and dielectric layers over via | Sheng-Chih Lai | 2023-10-24 |
| 11800703 | Vertical fuse memory in one-time program memory cells | Sheng-Chih Lai | 2023-10-24 |
| 11791335 | Method for forming semiconductor device | Wei-Yuan Lu, Feng-Cheng Yang | 2023-10-17 |
| 11792999 | Bipolar selector with independently tunable threshold voltages | Sheng-Chih Lai, Min Cao, Randy B. Osborne | 2023-10-17 |
| 11784219 | Method for manufacturing semiconductor device with spacer layer | Mark van Dal, Gerben Doornbos | 2023-10-10 |
| 11785779 | Method for forming a semiconductor memory structure using a liner layer as an etch stop | Yu-Wei Jiang, Sheng-Chih Lai, Feng-Cheng Yang | 2023-10-10 |
| 11776647 | Memory repair using optimized redundancy utilization | Chien-Hao Huang, Cheng-Yi Wu, Katherine H. Chiang | 2023-10-03 |
| 11778836 | Memory cell with unipolar selectors | Katherine H. Chiang, Mauricio Manfrini | 2023-10-03 |
| 11776602 | Memory array staircase structure | Meng-Han Lin, Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Yu-Ming Lin | 2023-10-03 |
| 11777010 | Semiconductor structure and method for forming the same | Yen-Chieh Huang, Hai-Ching Chen, Yu-Ming Lin | 2023-10-03 |
| 11769815 | Carrier barrier layer for tuning a threshold voltage of a ferroelectric memory device | Rainer Yen-Chieh Huang, Hai-Ching Chen, Yu-Ming Lin | 2023-09-26 |
| 11770935 | 3D ferroelectric memory | Sheng-Chih Lai | 2023-09-26 |
| 11757047 | Semiconducting metal oxide transistors having a patterned gate and methods for forming the same | Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu +1 more | 2023-09-12 |
| 11749341 | Multinary bit cells for memory devices and network applications and method of manufacturing the same | Katherine H. Chiang | 2023-09-05 |
| 11744080 | Three-dimensional memory device with word lines extending through sub-arrays, semiconductor device including the same and method for manufacturing the same | Meng-Han Lin, Han-Jong Chia, Yi-Ching Liu, Chia-En Huang, Sheng-Chen Wang +1 more | 2023-08-29 |