Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7273808 | Reactive barrier/seed preclean process for damascene process | — | 2007-09-25 |
| 6930038 | Dual damascene partial gap fill polymer fabrication process | Hsueh-Chung Chen | 2005-08-16 |
| 6399506 | Method for planarizing an oxide layer | — | 2002-06-04 |
| 6350681 | Method of forming dual damascene structure | Anseime Chen, Yi-Fang Cheng, I-Hsiung Huang | 2002-02-26 |
| 6277742 | Method of protecting tungsten plug from corroding | Chien-Jung Wang, Lien Jung Hung | 2001-08-21 |
| 6277741 | Method and planarizing polysilicon layer | — | 2001-08-21 |
| 6261921 | Method of forming shallow trench isolation structure | Ching Lang Yen | 2001-07-17 |
| 6245667 | Method of forming via | Ling-Sung Wang, Chien-Jung Wang | 2001-06-12 |
| 6232184 | Method of manufacturing floating gate of stacked-gate nonvolatile memory unit | Ling-Sung Wang | 2001-05-15 |
| 6221734 | Method of reducing CMP dishing effect | — | 2001-04-24 |
| 6207545 | Method for forming a T-shaped plug having increased contact area | — | 2001-03-27 |
| 6162679 | Method of manufacturing DRAM capacitor | — | 2000-12-19 |
| 6162732 | Method for reducing capacitance depletion during hemispherical grain polysilicon synthesis for DRAM | Dahcheng Lin | 2000-12-19 |
| 6159843 | Method of fabricating landing pad | — | 2000-12-12 |