Issued Patents All Time
Showing 1–25 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426226 | Macro and SRAM bit cell cooptimizatoin for performance (long/shortwordline combo SRAM) | Ping-Wei Wang, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao +3 more | 2025-09-23 |
| 12374590 | Test structure and test method thereof | Jing-Yi Lin, Chih-Chuan Yang, Kuo-Hsiu Hsu | 2025-07-29 |
| 12367925 | Static random access memory layout | Chih-Chuan Yang, Jui Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu +1 more | 2025-07-22 |
| 12363893 | Semiconductor memory structure | Hsin-Wen Su, Shih-Hao Lin, Yu-Kuan Lin, Ping-Wei Wang | 2025-07-15 |
| 12349329 | Memory device and method for forming the same | Hsin-Wen Su, Chih-Chuan Yang, Shih-Hao Lin, Yu-Kuan Lin, Ping-Wei Wang | 2025-07-01 |
| 12349330 | Shared pick-up regions for memory devices | Chih-Chuan Yang, Chao-Yuan Chang, Shih-Hao Lin, Chia-Hao Pao, Feng-Ming Chang +1 more | 2025-07-01 |
| 12336281 | Gate structures having neutral zones to minimize metal gate boundary effects and methods of fabricating thereof | Chia-Hao Pao, Chih-Hsuan Chen, Shih-Hao Lin | 2025-06-17 |
| 12302609 | Semiconductor device including alternating semiconductor layers with different widths and method for forming the same | Hsin-Wen Su, Yu-Kuan Lin, Shih-Hao Lin, Ping-Wei Wang | 2025-05-13 |
| 12219747 | Memory active region layout for improving memory performance | Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Chih-Hsuan Chen, Kian-Long Lim +3 more | 2025-02-04 |
| 12200921 | Memory device and method for forming the same | Hsin-Wen Su, Chih-Chuan Yang, Shih-Hao Lin, Yu-Kuan Lin, Ping-Wei Wang | 2025-01-14 |
| 12178032 | Source/drain feature separation structure | Wen-Chun Keng, Kuo-Hsiu Hsu, Chih-Chuan Yang, Ping-Wei Wang | 2024-12-24 |
| 12160985 | Shared bit lines for memory cells | Ping-Wei Wang, Chih-Chuan Yang, Feng-Ming Chang, Kuo-Hsiu Hsu, Kian-Long Lim +1 more | 2024-12-03 |
| 12156394 | SRAM structure and method for forming the same | Ming-Chang Wen, Kuo-Hsiu Hsu, Jyun-Yu Tian, Wan-Yao Wu, Chang-Yun Chang +1 more | 2024-11-26 |
| 12080604 | Gate-all-around semiconductor device and method | Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Wei Lee +4 more | 2024-09-03 |
| 12080342 | Static random access memory (SRAM) with a pre- charge assist circuit | Chia-Hao Pao, Kian-Long Lim, Chih-Chuan Yang, Jui Chang, Chao-Yuan Chang +2 more | 2024-09-03 |
| 12048135 | Four-poly-pitch SRAM cell with backside metal tracks | Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim, Ping-Wei Wang, Ruey-Wen Chang | 2024-07-23 |
| 12016169 | Optimized static random access memory | Ping-Wei Wang, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan Lin, Chia-Hao Pao +3 more | 2024-06-18 |
| 12009428 | Semiconductor device and method | Chih-Chuan Yang, Kuo-Hsiu Hsu, Feng-Ming Chang, Kian-Long Lim | 2024-06-11 |
| 11996338 | Test structure and test method thereof | Jing-Yi Lin, Chih-Chuan Yang, Kuo-Hsiu Hsu | 2024-05-28 |
| 11980016 | Connection between source/drain and gate | Chih-Chuan Yang, Chia-Hao Pao, Yu-Kuan Lin, Ping-Wei Wang, Shih-Hao Lin | 2024-05-07 |
| 11961769 | Structure and process of integrated circuit having latch-up suppression | Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Hsin-Wen Su, Ping-Wei Wang | 2024-04-16 |
| 11956948 | Memory device and method for forming the same | Hsin-Wen Su, Yu-Kuan Lin, Shih-Hao Lin, Ping-Wei Wang | 2024-04-09 |
| 11942145 | Static random access memory layout | Chih-Chuan Yang, Jui Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu +1 more | 2024-03-26 |
| 11937415 | Fin-based well straps for improving memory macro performance | Chih-Chuan Yang, Kuo-Hsiu Hsu, Feng-Ming Chang, Wen-Chun Keng | 2024-03-19 |
| 11908860 | Integrated chip with improved latch-up immunity | Hsin-Wen Su, Ping-Wei Wang, Wen-Chun Keng, Chih-Chuan Yang, Shih-Hao Lin | 2024-02-20 |