Issued Patents All Time
Showing 76–100 of 263 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11735587 | Backside PN junction diode | Yu-Xuan Huang, Jam-Wem Lee, Kuo-Ji Chen, Kuan-Lun Cheng | 2023-08-22 |
| 11735482 | Semiconductor device structure and methods of forming the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Shang-Wen Chang, Kuan-Lun Cheng, Chih-Hao Wang | 2023-08-22 |
| 11715781 | Semiconductor devices with improved capacitors | Wang-Chun Huang, Kuan-Lun Cheng, Chih-Hao Wang | 2023-08-01 |
| 11710667 | Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same | Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Chih-Hao Wang +3 more | 2023-07-25 |
| 11705488 | Nano-sheet-based devices with asymmetric source and drain configurations | Cheng-Ting Chung, Yu-Xuan Huang, Yi-Bo Liao, Kuan-Lun Cheng | 2023-07-18 |
| 11699733 | Semiconductor devices | Cheng-Ting Chung, Kuan-Lun Cheng | 2023-07-11 |
| 11676819 | Method for metal gate cut and structure thereof | Pei-Yu Wang, Zhi-Chang Lin, Kuan-Lun Cheng | 2023-06-13 |
| 11664454 | Method for forming semiconductor device structure | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang | 2023-05-30 |
| 11664451 | Method and device for boosting performance of FinFETs via strained spacer | Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Wei Ju Lee, Kuan-Lun Cheng | 2023-05-30 |
| 11664374 | Backside interconnect structures for semiconductor devices and methods of forming the same | Cheng-Ting Chung, Hou-Yu Chen | 2023-05-30 |
| 11658119 | Backside signal interconnection | Yu-Xuan Huang, Yi-Hsun Chiu, Yi-Bo Liao, Kuan-Lun Cheng, Wei-Cheng Lin +6 more | 2023-05-23 |
| 11652001 | FinFET channel on oxide structures and related methods | Kuo-Cheng Ching, Ying-Keung Leung | 2023-05-16 |
| 11646238 | Dual crystal orientation for semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Lun Cheng | 2023-05-09 |
| 11640989 | Semiconductor device structure with metal gate stack | Wang-Chun Huang, Kuan-Lun Cheng, Chih-Hao Wang | 2023-05-02 |
| 11637196 | Semiconductor structure and method of manufacturing the same | Chi-Yi Chuang, Kuan-Lun Cheng, Chih-Hao Wang | 2023-04-25 |
| 11637042 | Self-aligned metal gate for multigate device | Guan-Lin Chen, Kuo-Cheng Chiang, Chih-Hao Wang, Kuan-Lun Cheng, Shi Ning Ju +1 more | 2023-04-25 |
| 11594619 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Chiang, Chi-Wen Liu, Ying-Keung Leung | 2023-02-28 |
| 11594612 | Metal oxide interlayer structure for nFET and pFET | Min Cao, Pei-Yu Wang, Sai-Hooi Yeong, Kuan-Lun Cheng, Chih-Hao Wang | 2023-02-28 |
| 11588018 | Semiconductor device structure with nanostructure and method for forming the same | Sai-Hooi Yeong, Bo-Feng Young | 2023-02-21 |
| 11581436 | Negative capacitance transistor with a diffusion blocking layer | Chi-Hsing Hsu, Kuan-Lun Cheng, Chih-Hao Wang, Sai-Hooi Yeong | 2023-02-14 |
| 11575034 | Back end of line nanowire power switch transistors | Li-Yang Chuang, Wang-Chun Huang, Kuan-Lun Cheng | 2023-02-07 |
| 11563001 | Air spacer and capping structures in semiconductor devices | Lin-Yu Huang, Chiao-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Kuan-Lun Cheng | 2023-01-24 |
| 11532556 | Structure and method for transistors having backside power rails | Yu-Xuan Huang, Cheng-Ting Chung, Cheng-Chi Chuang, Shang-Wen Chang | 2022-12-20 |
| 11532519 | Semiconductor device and method | Yi-Bo Liao, Kai-Chieh Yang, Kuan-Lun Cheng | 2022-12-20 |
| 11532622 | High performance MOSFETs having different device characteristics | Tetsu Ohtou, Jiun-Jia Huang, Kuan-Lun Cheng, Chi-Hsing Hsu | 2022-12-20 |