Issued Patents All Time
Showing 426–450 of 937 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11626402 | Semiconductor device structure | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Ting Pan, Zhi-Chang Lin | 2023-04-11 |
| 11626327 | Methods of fabricating semiconductor devices with mixed threshold voltages boundary isolation of multiple gates and structures formed thereby | Kuo-Cheng Chiang, Chung-Wei Hsu, Lung-Kun Chu, Jia-Ni Yu, Mao-Lin Huang | 2023-04-11 |
| 11621352 | Semiconductor device and method of manufacturing the same | Jia-Chuan You, Chia-Hao Chang, Yu-Ming Lin | 2023-04-04 |
| 11621323 | Fill fins for semiconductor devices | Kuo-Cheng Ching, Kuan-Lun Cheng | 2023-04-04 |
| 11621224 | Contact features and methods of fabricating the same in semiconductor devices | Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin | 2023-04-04 |
| 11621197 | Semiconductor device with gate cut feature and method for forming the same | Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Lo-Heng Chang, Cheng-Chi Chuang +1 more | 2023-04-04 |
| 11621195 | Semiconductor device and method of manufacturing the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Yi-Bo Liao, Yi-Ruei Jhan | 2023-04-04 |
| 11616143 | Semiconductor devices with backside power rail and methods of fabrication thereof | Chun-Yuan Chen, Huan-Chieh Su, Pei-Yu Wang | 2023-03-28 |
| 11616062 | Gate isolation for multigate device | Shi Ning Ju, Kuo-Cheng Chiang, Kuan-Ting Pan, Zhi-Chang Lin, Shih-Cheng Chen | 2023-03-28 |
| 11615962 | Semiconductor structures and methods thereof | Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu +1 more | 2023-03-28 |
| 11610983 | Epitaxial features confined by dielectric fins and spacers | Kuo-Cheng Chiang, Kuan-Lun Cheng | 2023-03-21 |
| 11610977 | Methods of forming nano-sheet-based devices having inner spacer structures with different widths | Jui-Chien Huang, Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen | 2023-03-21 |
| 11610805 | Replacement material for backside gate cut feature | Wang-Chun Huang, Yu-Xuan Huang, Hou-Yu Chen, Kuan-Lun Cheng | 2023-03-21 |
| 11605736 | Low-capacitance structures and processes | Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin | 2023-03-14 |
| 11600533 | Semiconductor device fabrication methods and structures thereof | Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu +1 more | 2023-03-07 |
| 11600529 | Multi-gate devices and method of fabricating the same | Lo-Heng Chang, Kuo-Cheng Chiang, Jung-Hung Chang, Pei-Hsun Wang | 2023-03-07 |
| 11594614 | P-metal gate first gate replacement process for multigate devices | Jia-Ni Yu, Kuo-Cheng Chiang, Lung-Kun Chu, Chung-Wei Hsu, Mao-Lin Huang | 2023-02-28 |
| 11594612 | Metal oxide interlayer structure for nFET and pFET | Min Cao, Pei-Yu Wang, Sai-Hooi Yeong, Ching-Wei Tsai, Kuan-Lun Cheng | 2023-02-28 |
| 11594602 | Butted contacts and methods of fabricating the same in semiconductor devices | Li-Zhen Yu, Lin-Yu Huang, Cheng-Chi Chuang, Yu-Ming Lin | 2023-02-28 |
| 11588050 | Backside contact | Li-Zhen Yu, Huan-Chieh Su, Lin-Yu Huang, Kuan-Lun Cheng | 2023-02-21 |
| 11581437 | Semiconductor device structure and methods of forming the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Pei-Yu Wang, Cheng-Ting Chung | 2023-02-14 |
| 11581436 | Negative capacitance transistor with a diffusion blocking layer | Chi-Hsing Hsu, Ching-Wei Tsai, Kuan-Lun Cheng, Sai-Hooi Yeong | 2023-02-14 |
| 11581415 | Multi-layer channel structures and methods of fabricating the same in field-effect transistors | Guan-Lin Chen, Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Lun Cheng | 2023-02-14 |
| 11581224 | Method for forming long channel back-side power rail device | Huan-Chieh Su, Cheng-Chi Chuang, Zhi-Chang Lin, Li-Zhen Yu | 2023-02-14 |
| 11575027 | Dummy dielectric fin design for parasitic capacitance reduction | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Lun Cheng | 2023-02-07 |