Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11925017 | Semiconductor device having a wall structure surrounding a stacked gate structure | Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan +1 more | 2024-03-05 |
| 11764285 | Method of manufacturing semiconductor device | Yi-Chuan Lin, Shang-Yen Wu | 2023-09-19 |
| 11411097 | Semiconductor device | Yi-Chuan Lin, Shang-Yen Wu | 2022-08-09 |
| 11121141 | Semiconductor structure and method for forming the same | Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Hsin-Chi Chen | 2021-09-14 |
| 11018233 | Flash memory cell structure with step-shaped floating gate | Yu-Hsien Chu, Cheng-Huan Chung | 2021-05-25 |
| 10825914 | Manufacturing method of semiconductor device | Yi-Chuan Lin, Shang-Yen Wu | 2020-11-03 |
| 10672777 | Method of manufacturing semiconductor device having multi-height structure | Kuan-Wei Su, Yung-Lung Hsu, Chih-Hsun Lin, Kun-Tsang Chuang, Chia-Yi Tseng | 2020-06-02 |
| 10658479 | Flash memory cell structure with step-shaped floating gate | Yu-Hsien Chu, Cheng-Huan Chung | 2020-05-19 |
| 10535670 | Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same | Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan +1 more | 2020-01-14 |
| 10283510 | Semiconductor structure and method for forming the same | Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Hsin-Chi Chen | 2019-05-07 |
| 10211214 | Semiconductor device having milti-height structure and method of manufacturing the same | Kuan-Wei Su, Yung-Lung Hsu, Chih-Hsun Lin, Kun-Tsang Chuang, Chia-Yi Tseng | 2019-02-19 |
| 10163641 | Memory with a raised dummy feature surrounding a cell region | Chih-Ming Lee, Kun-Tsang Chuang, Yung-Lung Hsu, Hsin-Chi Chen | 2018-12-25 |
| 10103235 | Gate structure with multiple spacers | Chia-Ming Pan, Pei-Chi Ho, Ping-Pang Hsieh | 2018-10-16 |
| 9997479 | Method for manufacturing redistribution layer | Szu-Hsien Lu | 2018-06-12 |
| 9947759 | Semiconductor device having milti-height structure and method of manufacturing the same | Yu-Shih Lin, Kun-Tsang Chuang, Yung-Lung Hsu | 2018-04-17 |
| 9899395 | Semiconductor device and method for manufacturing the same | Chih-Ming Lee, Po-Wei Liu, Yung-Lung Hsu, Hsin-Chi Chen | 2018-02-20 |
| 9768182 | Semiconductor structure and method for forming the same | Chien-Hsuan Liu, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Hsin-Chi Chen | 2017-09-19 |
| 9728543 | Semiconductor structure and fabricating method thereof | Chia-Ming Pan, Kun-Tsang Chuang, Po-Wei Liu, Yong-Shiuan Tsair | 2017-08-08 |
| 9653302 | Gate structure with multiple spacer and method for manufacturing the same | Chia-Ming Pan, Pei-Chi Ho, Ping-Pang Hsieh | 2017-05-16 |
| 9418948 | Method of making bond pad | Chun-Che Huang, Shih-Chieh Chang | 2016-08-16 |
| 9263316 | Method for forming a semiconductor device with void-free shallow trench isolation | Shang-Yen Wu, Ping-Pang Hsieh | 2016-02-16 |
| 9252109 | Method of making bond pad | Chun-Che Huang, Shih-Chieh Chang | 2016-02-02 |
| 8796851 | Bonding pad and method of making same | Chun-Che Huang, Shih-Chieh Chang | 2014-08-05 |
| 7986029 | Dual SOI structure | Kuang-Hsin Chen, I-Lu Wu | 2011-07-26 |
| 7781316 | Methods of manufacturing metal-silicide features | Chen-Tung Lin, Chih-Wei Chang, Chii-Ming Wu, Mei-Yun Wang, Shau-Lin Shue | 2010-08-24 |