Issued Patents All Time
Showing 76–100 of 150 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6579761 | Method to improve the coupling ratio of top gate to floating gate in flash | — | 2003-06-17 |
| 6573555 | Source side injection programming and tip erasing P-channel split gate flash memory cell | Yai-Fen Lin, Di-Son Kuo, Hung-Cheng Sung | 2003-06-03 |
| 6573142 | Method to fabricate self-aligned source and drain in split gate flash | — | 2003-06-03 |
| 6569736 | Method for fabricating square polysilicon spacers for a split gate flash memory device by multi-step polysilicon etch | Cheng-Yuan Hsu, Hung-Cheng Sung, Su-Chang Chen, Han-Ping Chen, Der-Shin Shyu | 2003-05-27 |
| 6559501 | Method for forming split-gate flash cell for salicide and self-align contact | Hung-Cheng Sung, Di-Son Kuo | 2003-05-06 |
| 6544828 | Adding a poly-strip on isolation's edge to improve endurance of high voltage NMOS on EEPROM | Wen-Ting Chu, Di-Son Kuo, Jack Y. Yeh, Chrong-Jung Lin, Sheng-Wei Tsaur | 2003-04-08 |
| 6538277 | Split-gate flash cell | Hung-Cheng Sung, Di-Son Kuo, Chuang-Ke Yeh, Yai-Fen Lin, Wen-Ting Chu | 2003-03-25 |
| 6538276 | Split gate flash memory device with shrunken cell and source line array dimensions | Yai-Fen Liu, Hung-Cheng Sung, Di-Son Kuo | 2003-03-25 |
| 6534821 | Structure with protruding source in split-gate flash | Yai-Fen Lin, Hung-Cheng Sung, Chuang-Ke Yeh, Wen-Ting Chu, Di-Son Kuo | 2003-03-18 |
| 6504206 | Split gate flash cell for multiple storage | Hung-Cheng Sung, Di-Son Kuo, Yai-Fen Lin | 2003-01-07 |
| 6483159 | Undoped polysilicon as the floating-gate of a split-gate flash cell | Yai-Fen Lin, Hung-Cheng Sung, Juang-Ke Yeh, Di-Son Kuo | 2002-11-19 |
| 6479859 | Split gate flash memory with multiple self-alignments | Tai-Fen Lin, Wen-Ting Chu, Chuang-Ke Yeh, Hung-Cheng Sung, Di-Son Kuo | 2002-11-12 |
| 6468863 | Split gate field effect transistor (FET) device employing dielectric barrier layer and method for fabrication thereof | Di-Son Kuo, Jake Yeh, Chuan-Li Chang, Wen-Ting Chu, Sheng-Wei Tsaur | 2002-10-22 |
| 6465841 | Split gate flash memory device having nitride spacer to prevent inter-poly oxide damage | Yai-Fen Lin, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo | 2002-10-15 |
| 6465836 | Vertical split gate field effect transistor (FET) device | Chrong-Jung Lin, Sheng-Wei Tsao, Di-Son Kuo, Jack Y. Yeh, Wen-Ting Chu +1 more | 2002-10-15 |
| 6441429 | Split-gate flash memory device having floating gate electrode with sharp peak | Hung-Cheng Sung, Yai-Fen Lin, Di-Son Kuo | 2002-08-27 |
| 6420233 | Split gate field effect transistor (FET) device employing non-linear polysilicon floating gate electrode dopant profile | Di-Son Kuo, Jake Yeh, Chung-Li Chang, Wen-Ting Chu, Chrong-Jung Lin | 2002-07-16 |
| 6417049 | Split gate flash cell for multiple storage | Hung-Cheng Sung, Di-Son Kuo, Yai-Fen Lin | 2002-07-09 |
| 6410957 | Method of forming poly tip to improve erasing and programming speed in split gate flash | Di-Son Kuo, Yai-Fen Lin, Hung-Cheng Sung | 2002-06-25 |
| 6403494 | Method of forming a floating gate self-aligned to STI on EEPROM | Wen-Ting Chu, Di-Son Kuo, Jack Y. Yeh, Chuan-Li Chang | 2002-06-11 |
| 6396112 | Method of fabricating buried source to shrink chip size in memory array | Jenn Tsao, Di-Son Kuo, Yai-Fen Lin, Hung-Cheng Sung | 2002-05-28 |
| 6385089 | Split-gate flash cell for virtual ground architecture | Hung-Cheng Sung, Din-Son Kuo, Yai-Fen Lin | 2002-05-07 |
| 6380035 | Poly tip formation and self-align source process for split-gate flash cell | Hung-Cheng Sung, Di-Son Kuo, Yai-Fen Lin | 2002-04-30 |
| 6380583 | Method to increase coupling ratio of source to floating gate in split-gate flash | Yai-Fen Lin, Di-Son Kuo, Hung-Cheng Sung, Jack Y. Yeh | 2002-04-30 |
| 6358796 | Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation | Yai-Fen Lin, Chang-Song Lin, Hung-Cheng Sung, Juang-Ke Yeh | 2002-03-19 |