Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6544828 | Adding a poly-strip on isolation's edge to improve endurance of high voltage NMOS on EEPROM | Wen-Ting Chu, Di-Son Kuo, Jack Y. Yeh, Chia-Ta Hsieh, Chrong-Jung Lin | 2003-04-08 |
| 6468863 | Split gate field effect transistor (FET) device employing dielectric barrier layer and method for fabrication thereof | Chia-Ta Hsieh, Di-Son Kuo, Jake Yeh, Chuan-Li Chang, Wen-Ting Chu | 2002-10-22 |
| 6387757 | Sacrificial self aligned spacer layer ion implant mask method for forming a split gate field effect transistor (FET) device | Wen-Ting Chu, Di-Son Kuo, Jake Yeh, Chia-Da Hsieh, Chuan-Li Chang | 2002-05-14 |