Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12389667 | Fin field-effect transistor device and method | Meng Jhe Tsai, Hong-Jie Yang, Meng-Chun Chang, Hao Chiang, Chia-Ying Lee +1 more | 2025-08-12 |
| 12040233 | Fin field-effect transistor device and method | Meng Jhe Tsai, Hong-Jie Yang, Meng-Chun Chang, Hao Chiang, Chia-Ying Lee +1 more | 2024-07-16 |
| 7370441 | Hobnail structure | — | 2008-05-13 |
| 6468863 | Split gate field effect transistor (FET) device employing dielectric barrier layer and method for fabrication thereof | Chia-Ta Hsieh, Di-Son Kuo, Jake Yeh, Wen-Ting Chu, Sheng-Wei Tsaur | 2002-10-22 |
| 6417046 | Modified nitride spacer for solving charge retention issue in floating gate memory cell | Ming-Chou Ho, Wen-Ting Chu, Chang-Song Lin, Hsin-Ming Chen, Di-Son Kuo | 2002-07-09 |
| 6403494 | Method of forming a floating gate self-aligned to STI on EEPROM | Wen-Ting Chu, Di-Son Kuo, Jack Y. Yeh, Chia-Ta Hsieh | 2002-06-11 |
| 6387757 | Sacrificial self aligned spacer layer ion implant mask method for forming a split gate field effect transistor (FET) device | Wen-Ting Chu, Di-Son Kuo, Jake Yeh, Chia-Da Hsieh, Sheng-Wei Tsaur | 2002-05-14 |
| 6117732 | Use of a metal contact structure to increase control gate coupling capacitance for a single polysilicon non-volatile memory cell | Wen-Ting Chu, Ming-Chou Ho, Chang-Song Lin, Di-Son Kuo | 2000-09-12 |
| 6110782 | Method to combine high voltage device and salicide process | Wen-Ting Chu, Ming-Chon Ho, Chang-Song Lin, Di-Son Kwo | 2000-08-29 |