Issued Patents All Time
Showing 76–100 of 121 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11158807 | Field effect transistor and method of manufacturing the same | Timothy Vasen, Matthias Passlack, Martin Christopher Holland, Tse-An Chen, Lain-Jong Li | 2021-10-26 |
| 11152481 | Gate stacks for stack-fin channel I/O devices and nanowire channel core devices | Wei-Sheng Yun, I-Sheng Chen, Shao-Ming Yu, Tzu-Chiang Chen, Chih Chieh Yeh | 2021-10-19 |
| 11145676 | Memory device and multi-level memory cell having ferroelectric storage element and magneto-resistive storage element | Hung-Li Chiang, Chih-Sheng Chang, Tzu-Chiang Chen, Jin Cai | 2021-10-12 |
| 11139431 | Horizontal memory array structure with scavenger layer | Hung-Li Chiang, Tzu-Chiang Chen, Yu-Sheng Chen | 2021-10-05 |
| 11056400 | Semiconductor device and method | Tzu-Chiang Chen, Chen-Feng Hsu, Yu-Lin Yang, Tung Ying Lee, Chih Chieh Yeh | 2021-07-06 |
| 11043578 | Nanowire stack GAA device with inner spacer | Tzu-Chung Wang, Tzu-Chiang Chen, Tung Ying Lee | 2021-06-22 |
| 11043577 | Semiconductor device and method of manufacturing the same | Yu-Lin Yang, Wei-Sheng Yun, Chen-Feng Hsu, Tzu-Chiang Chen | 2021-06-22 |
| 11038044 | Semiconductor device and manufacturing method thereof | Hung-Li Chiang, Tzu-Chiang Chen, I-Sheng Chen | 2021-06-15 |
| 11038043 | Semiconductor device and manufacturing method thereof | Hung-Li Chiang, Tzu-Chiang Chen, I-Sheng Chen | 2021-06-15 |
| 11004965 | Forming semiconductor structures with two-dimensional materials | Hung-Li Chiang, Chun-Chieh Lu, Ming-Yang Li, Tzu-Chiang Chen | 2021-05-11 |
| 10991811 | Structure and formation method of semiconductor device structure with nanowires | Wei-Sheng Yun, Shao-Ming Yu, Tsung-Lin Lee, Chih Chieh Yeh | 2021-04-27 |
| 10964798 | Semiconductor device and method of manufacturing the same | Yu-Lin Yang, Wei-Sheng Yun, Chen-Feng Hsu, Tzu-Chiang Chen | 2021-03-30 |
| 10964817 | (110) surface orientation for reducing fermi-level-pinning between high-K dielectric and group III-V compound semiconductor device | Chih-Hsin Ko, Hsingjen Wann | 2021-03-30 |
| 10950693 | Method of manufacturing a semiconductor device and a semiconductor device | Yu-Lin Yang, Tzu-Chiang Chen, I-Sheng Chen | 2021-03-16 |
| 10930498 | Methods for producing nanowire stack GAA device with inner spacer | Tzu-Chung Wang, Tzu-Chiang Chen, Tung Ying Lee | 2021-02-23 |
| 10930795 | Nanowire stack GAA device with inner spacer and methods for producing the same | I-Sheng Chen, Tzu-Chiang Chen, Carlos H. Diaz | 2021-02-23 |
| 10886182 | Method of manufacturing a semiconductor device and a semiconductor device | I-Sheng Chen, Hung-Li Chiang, Tzu-Chiang Chen | 2021-01-05 |
| 10868127 | Gate-all-around structure and manufacturing method for the same | Yu-Lin Yang, I-Sheng Chen, Tzu-Chiang Chen | 2020-12-15 |
| 10868114 | Isolation structures of semiconductor devices | Hung-Li Chiang, Tzu-Chiang Chen, I-Sheng Chen | 2020-12-15 |
| 10854708 | Capacitor having multiple graphene structures | Chewn-Pu Jou, Chih-Hsin Ko, Po-Wen Chiu, Chun-Chieh Lu, Chi-Feng Huang +3 more | 2020-12-01 |
| 10818777 | Method of manufacturing a semiconductor device and a semiconductor device | Kuo-Cheng Chiang, Chen-Feng Hsu, Tzu-Chiang Chen, Tung Ying Lee, Wei-Sheng Yun +1 more | 2020-10-27 |
| 10811518 | Method of manufacturing a semiconductor device and a semiconductor device | Chen-Feng Hsu, Tzu-Chiang Chen, Tung Ying Lee, Wei-Sheng Yun, Yu-Lin Yang | 2020-10-20 |
| 10804367 | Gate stacks for stack-fin channel I/O devices and nanowire channel core devices | Wei-Sheng Yun, I-Sheng Chen, Shao-Ming Yu, Tzu-Chiang Chen, Chih Chieh Yeh | 2020-10-13 |
| 10770588 | (110) surface orientation for reducing fermi-level-pinning between high-K dielectric and group III-V compound semiconductor device | Chih-Hsin Ko, Hsingjen Wann | 2020-09-08 |
| 10727344 | Method of manufacturing a semiconductor device with multilayered channel structure | Chih Chieh Yeh, Cheng-Hsien Wu, Hung-Li Chiang, Jung-Piao Chiu, Tzu-Chiang Chen +3 more | 2020-07-28 |