Issued Patents All Time
Showing 251–259 of 259 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6359311 | Quasi-surrounding gate and a method of fabricating a silicon-on-insulator semiconductor device with the same | Jean-Pierre Colinge | 2002-03-19 |
| 6284579 | Drain leakage reduction by indium transient enchanced diffusion (TED) for low power applications | Jyh-Haur Wang, Bi-Ling Lin, Chung-Cheng Wu | 2001-09-04 |
| 6194285 | Formation of shallow trench isolation (STI) | Chung-Te Lin, Kong-Bong Thei | 2001-02-27 |
| 5796638 | Methods, apparatus and computer program products for synthesizing integrated circuits with electrostatic discharge capability and connecting ground rules faults therein | Sung-Mo Kang, Charvaka Duvvury, Sridhar Ramaswamy | 1998-08-18 |
| 5760445 | Device and method of manufacture for protection against plasma charging damage in advanced MOS technologies | — | 1998-06-02 |
| 5550699 | Hot plug tolerant ESD protection for an IC | — | 1996-08-27 |
| 5468667 | Method of placing source contacts for efficient ESD/EOS protection in grounded substrate MOS integrated circuit | Charvaka Duvvury, Sung-Mo Kang | 1995-11-21 |
| 5450267 | ESD/EOS protection circuits for integrated circuits | Charvaka Duvvury, Sung-Mo Kang | 1995-09-12 |
| 5404041 | Source contact placement for efficient ESD/EOS protection in grounded substrate MOS integrated circuit | Charvaka Duvvury, Sung-Mo Kang | 1995-04-04 |