Issued Patents All Time
Showing 76–100 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7838392 | Methods for forming III-V semiconductor device structures | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2010-11-23 |
| 7799592 | Tri-gate field-effect transistors formed by aspect ratio trapping | — | 2010-09-21 |
| 7776697 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same | Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2010-08-17 |
| 7777250 | Lattice-mismatched semiconductor structures and related methods for device fabrication | — | 2010-08-17 |
| 7638842 | Lattice-mismatched semiconductor structures on insulators | Matthew T. Currie, Zhiyuan Cheng, Thomas A. Langdo | 2009-12-29 |
| 7626246 | Solutions for integrated circuit integration of alternative active area materials | Matthew T. Currie, Zhi-Yuan Cheng, James Fiorenza | 2009-12-01 |
| 7615829 | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors | Thomas A. Langdo, Richard Westhoff | 2009-11-10 |
| 7588994 | Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2009-09-15 |
| 7566606 | Methods of fabricating semiconductor devices having strained dual channel layers | Matthew T. Currie, Christopher Leitz, Eugene A. Fitzgerald | 2009-07-28 |
| 7541208 | Methods for preserving strained semiconductor substrate layers during CMOS processing | Matthew T. Currie | 2009-06-02 |
| 7504704 | Shallow trench isolation process | Matthew T. Currie | 2009-03-17 |
| 7494881 | Methods for selective placement of dislocation arrays | Christopher Leitz, Matthew T. Currie, Mayank Bulsara | 2009-02-24 |
| 7439164 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements | Thomas A. Langdo | 2008-10-21 |
| 7420201 | Strained-semiconductor-on-insulator device structures with elevated source/drain regions | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2008-09-02 |
| 7416909 | Methods for preserving strained semiconductor substrate layers during CMOS processing | Matthew T. Currie | 2008-08-26 |
| 7414259 | Strained germanium-on-insulator device structures | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2008-08-19 |
| 7410861 | Methods of forming dynamic random access memory trench capacitors | Mayank Bulsara, Matthew T. Currie | 2008-08-12 |
| 7408214 | Dynamic random access memory trench capacitors | Mayank Bulsara, Matthew T. Currie | 2008-08-05 |
| 7326599 | Gate material for semiconductor device fabrication | Matthew T. Currie | 2008-02-05 |
| 7297612 | Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2007-11-20 |
| 7259388 | Strained-semiconductor-on-insulator device structures | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Eugene A. Fitzgerald | 2007-08-21 |
| 7208332 | Methods for preserving strained semiconductor substrate layers during CMOS processing | Matthew T. Currie | 2007-04-24 |
| 7202121 | Methods for preserving strained semiconductor substrate layers during CMOS processing | Matthew T. Currie | 2007-04-10 |
| 7172935 | Method of forming multiple gate insulators on a strained semiconductor heterostructure | Mayank Bulsara | 2007-02-06 |
| 7138310 | Semiconductor devices having strained dual channel layers | Matthew T. Currie, Christopher Leitz, Eugene A. Fitzgerald | 2006-11-21 |