| 12140628 |
Integrating machine learning delay estimation in FPGA-based emulation systems |
Yanhua Yi, Yu YANG, Jiajun Fan, Vijay Sundaresan, Jianfeng Huang |
2024-11-12 |
| 11860227 |
Machine learning delay estimation for emulation systems |
Yanhua Yi, Yu YANG, Jiajun Fan, Vijay Sundaresan, Jianfeng Huang |
2024-01-02 |
| 11853662 |
Machine-learning enhanced compiler |
Sankaranarayanan Srinivasan, Senthilkumar Thoravi Rajavel, Avinash Anantharamu, Pierre Clement, Saibal Ghosh +2 more |
2023-12-26 |
| 11366948 |
Machine-learning enhanced compiler |
Sankaranarayanan Srinivasan, Senthilkumar Thoravi Rajavel, Avinash Anantharamu, Pierre Clement, Saibal Ghosh +2 more |
2022-06-21 |
| 9405871 |
Determination of path delays in circuit designs |
Nagaraj Savithri, Atul Srinivasan, Sudip K. Nag |
2016-08-02 |
| 8091057 |
Synthesis, place, and route responsive to reasons for critical paths not meeting performance objective |
Vishal Suthar |
2012-01-03 |