Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 8627262 | Automatic generation of merged mode constraints for electronic circuits | Subramanyam Sripada, Cho Moon | 2014-01-07 | $4,268,000 |
| 8607186 | Automatic verification of merged mode constraints for electronic circuits | Subramanyam Sripada, Cho Moon | 2013-12-10 | $10,726,000 |
| 8290761 | Method and apparatus for rapidly modeling and simulating intra-die statistical variations in integrated circuits using compressed parameter models | Amith Singhee, Rob A. Rutenbar | 2012-10-16 | |
| 8261221 | Comparing timing constraints of circuits | Loa Mize, Cho Moon | 2012-09-04 | $4,639,000 |
| 7486110 | LUT based multiplexers | Naresh Kumar Bhatti | 2009-02-03 | $3,173,000 |