Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11704467 | Automated balanced global clock tree synthesis in multi level physical hierarchy | Ashima Sahil Dabare, Sanjiv Mathur, Anusha Reddy Sindhwala, Prakasha Karkada Holla, Sivakumar Arulanantham +2 more | 2023-07-18 |
| 11126780 | Automatic net grouping and routing | Yi-Ting Chung, Kuan-Yu Liao, Shih-Pin Hung, Kaichih Chi, Bing-Siang Chen | 2021-09-21 |
| 9747406 | Spine routing with multiple main spines | Chien-Hung Lu, Tung-Chieh Chen | 2017-08-29 |
| 8015522 | System for implementing post-silicon IC design changes | Hsin-Po Wang, Yu-Sheng Lu, Fong-Yuan Chang, Yi-Der Lin, Sung-Han Tsai +2 more | 2011-09-06 |