Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11704467 | Automated balanced global clock tree synthesis in multi level physical hierarchy | Ashima Sahil Dabare, Sanjiv Mathur, Anusha Reddy Sindhwala, Prakasha Karkada Holla, Sivakumar Arulanantham +2 more | 2023-07-18 |
| 11126780 | Automatic net grouping and routing | Yi-Ting Chung, Kuan-Yu Liao, Kaichih Chi, Bing-Siang Chen, Chun-Cheng Chi | 2021-09-21 |