Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10101365 | Semiconductor module, electrical connector, and inspection apparatus | — | 2018-10-16 |
| 9638746 | Probe card and inspection device | Yoshinori Kikuchi, Hirose Fujita | 2017-05-02 |
| 9442160 | Probe assembly and probe base plate | — | 2016-09-13 |
| 7589546 | Inspection apparatus and method for semiconductor IC | Naomi Miyake | 2009-09-15 |
| 6784681 | Semiconductor integrated circuit testing system and method | Keiichi Fujimoto | 2004-08-31 |
| 6781400 | Method of testing semiconductor integrated circuits and testing board for use therein | Shinichi Oki | 2004-08-24 |
| 6518779 | Probe card | Shinichi Oki, Masaaki Ishizaka | 2003-02-11 |
| 6400175 | Method of testing semiconductor integrated circuits and testing board for use therein | Shinichi Oki | 2002-06-04 |
| 6297658 | Wafer burn-in cassette and method of manufacturing probe card for use therein | Shinichi Oki | 2001-10-02 |
| 6229329 | Method of testing electrical characteristics of multiple semiconductor integrated circuits simultaneously | Shinichi Oki | 2001-05-08 |
| 6215321 | Probe card for wafer-level measurement, multilayer ceramic wiring board, and fabricating methods therefor | — | 2001-04-10 |
| 5983331 | Semiconductor integrated circuit having a plurality of chips | Hironori Akamatsu, Toshio Yamada, Hisakazu Kotani | 1999-11-09 |
| 5892368 | Semiconductor integrated circuit device having failure detection circuitry | Shin Hashimoto, Isao Miyanaga | 1999-04-06 |
| 5829126 | Method of manufacturing probe card | Koichi Nagao, Shinichi Oki | 1998-11-03 |
| 5825193 | Semiconductor integrated circuit device | Shin Hashimoto, Isao Miyanaga | 1998-10-20 |
| 5665610 | Semiconductor device checking method | Shinichi Oki, Koichi Nagao, Kenzo Hatada, Shigeoki Mori, Takashi Sato +1 more | 1997-09-09 |
| 5605844 | Inspecting method for semiconductor devices | Shinichi Oki, Koichi Nagao | 1997-02-25 |
| 5399890 | Semiconductor memory device in which a capacitor electrode of a memory cell and an interconnection layer of a peripheral circuit are formed in one level | Shozo Okada, Hisashi Ogawa, Naoto Matsuo, Toshiki Yabu, Susumu Matsumoto | 1995-03-21 |
| 5355081 | Method for testing a semiconductor integrated circuit having self testing circuit | Atsushi Fujiwara, Akinori Shibayama | 1994-10-11 |
| 5315543 | Semiconductor memory device and a manufacturing method thereof | Naoto Matsuo, Hisashi Ogawa, Shozo Okada | 1994-05-24 |
| 5300814 | Semiconductor device having a semiconductor substrate with reduced step between memory cells | Susumu Matsumoto, Shin Hashimoto, Toshio Yamada | 1994-04-05 |
| 5248936 | Semiconductor integrated circuit and a method of testing the same | Atsushi Fujiwara, Akinori Shibayama | 1993-09-28 |
| 5241201 | Dram with concentric adjacent capacitors | Naoto Matsuo, Shozo Okada, Susumu Matsumoto, Toshiki Yabu | 1993-08-31 |
| 5217914 | Method for making semiconductor integration circuit with stacked capacitor cells | Susumu Matsumoto, Toshiki Yabu, Naoto Matsuo, Shozo Okada, Hiroyuki Sakai | 1993-06-08 |
| 5214296 | Thin-film semiconductor device and method of fabricating the same | Naoto Matsuo, Toshiki Yabu, Susumu Matsumoto, Shozo Okada | 1993-05-25 |