Issued Patents All Time
Showing 26–50 of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8458562 | Secondary memory element for non-volatile memory | Stefano Corno, Gian Pietro Vanalli, Manuela Scognamiglio, Danilo Caraccio, Federico Tiziani +2 more | 2013-06-04 |
| 8370702 | Error correcting codes for increased storage capacity in multilevel memory devices | Paolo Amato | 2013-02-05 |
| 8228684 | Multi chip electronic system | Aldo Losavio, Stefano Ricciardi | 2012-07-24 |
| 7777466 | Voltage regulator or non-volatile memories implemented with low-voltage transistors | Luca Crippa, Giancarlo Ragone, Miriam Sangalli, Rino Micheloni | 2010-08-17 |
| 7675788 | Electronic non-volatile memory device having a cNAND structure and being monolithically integrated on semiconductor | — | 2010-03-09 |
| 7616515 | Integrated electronic device having a low voltage electric supply | Gian Pietro Vanalli, Pier Paolo Stoppino, Roberto Dossi, Aldo Losavio | 2009-11-10 |
| 7592849 | Level shifter for semiconductor memory device implemented with low-voltage transistors | Rino Micheloni | 2009-09-22 |
| 7499345 | Non-volatile memory implemented with low-voltages transistors and related system and method | Rino Micheloni, Luca Crippa, Giancarlo Ragone, Miram Sangalli | 2009-03-03 |
| 7184319 | Method for erasing non-volatile memory cells and corresponding memory device | Rino Micheloni | 2007-02-27 |
| 7168016 | Method and a device for testing electronic memory devices | Stefano Commodaro, Massimiliano Picca, Patrizia Mongelli | 2007-01-23 |
| 7035142 | Non volatile memory device including a predetermined number of sectors | Osama Khouri, Roberto Ravasio, Rino Micheloni | 2006-04-25 |
| 7027317 | Semiconductor memory with embedded DRAM | Rino Micheloni | 2006-04-11 |
| 6947329 | Method for detecting a resistive path or a predetermined potential in non-volatile memory electronic devices | Rino Micheloni | 2005-09-20 |
| 6944061 | Single cell erasing method for recovering memory cells under programming disturbs in non volatile semiconductor memory devices | Emilio Camerlenghi, Tecla Ghilardi | 2005-09-13 |
| 6891755 | Architecture for a flash-EEPROM simultaneously readable in other sectors while erasing and/or programming one or more sectors | Andrea Silvagni, Rino Micheloni | 2005-05-10 |
| 6871258 | METHOD FOR ERASING AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE, AND AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE | Rino Micheloni, Salvatrice Scommegna | 2005-03-22 |
| 6829168 | Power supply circuit structure for a row decoder of a multilevel non-volatile memory device | Rino Micheloni | 2004-12-07 |
| 6728141 | Method and circuit for timing dynamic reading of a memory cell with control of the integration time | Rino Micheloni | 2004-04-27 |
| 6724658 | Method and circuit for generating reference voltages for reading a multilevel memory cell | Rino Micheloni | 2004-04-20 |
| 6646913 | Method for storing and reading data in a multilevel nonvolatile memory | Rino Micheloni | 2003-11-11 |
| 6643179 | Method and circuit for dynamic reading of a memory cell, in particular a multi-level nonvolatile memory cell | Rino Micheloni | 2003-11-04 |
| 6639833 | Method and circuit for dynamic reading of a memory cell at low supply voltage and with low output dynamics | Rino Micheloni | 2003-10-28 |
| 6587914 | Non-volatile memory capable of autonomously executing a program | — | 2003-07-01 |
| 6532171 | Nonvolatile semiconductor memory capable of selectively erasing a plurality of elemental memory units | Roberto Gastaldi, Paolo Cappelletti, Giulio Casagrande, Rino Micheloni | 2003-03-11 |
| 6515911 | Circuit structure for providing a hierarchical decoding in semiconductor memory devices | Rino Micheloni | 2003-02-04 |