Issued Patents All Time
Showing 51–75 of 101 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6493260 | Nonvolatile memory device, having parts with different access time, reliability, and capacity | Rino Micheloni | 2002-12-10 |
| 6456530 | Nonvolatile memory device with hierarchical sector decoding | Rino Micheloni, Matteo Zammattio | 2002-09-24 |
| 6456527 | Nonvolatile multilevel memory and reading method thereof | Rino Micheloni | 2002-09-24 |
| 6433583 | CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching | Rino Micheloni, Atsushi Ohba, Marcello Carrera | 2002-08-13 |
| 6396168 | Programmable logic arrays | Stefano Ghezzi, Donato Ferrario, Emilio Yero | 2002-05-28 |
| 6356481 | Row decoder for a nonvolatile memory with capability of selectively biasing word lines to positive or negative voltages | Rino Micheloni, Atsushi Ohba, Marcello Carrera | 2002-03-12 |
| 6351413 | Nonvolatile memory device, in particular a flash-EEPROM | Rino Micheloni, Stefano Commodaro, Francesco Farina | 2002-02-26 |
| 6327184 | Read circuit for a nonvolatile memory | Rino Micheloni, Luca Crippa | 2001-12-04 |
| 6304490 | Memory cell integrated structure with corresponding biasing device | Stefano Zanardi, Maurizio Branchetti, Stefano Ghezzi | 2001-10-16 |
| 6301152 | Non-volatile memory device with row redundancy | Alessandro Manstretta, Rino Micheloni | 2001-10-09 |
| 6301149 | Method for reading a multilevel nonvolatile memory and multilevel nonvolatile memory | Rino Micheloni | 2001-10-09 |
| 6286086 | Data protection method for a semiconductor memory and corresponding protected memory device | Stefano Ghezzi, Giuseppe Giannini, Piero Enrico Torricelli | 2001-09-04 |
| 6266222 | ESD protection network for circuit structures formed in a semiconductor | Paolo Colombo, Jacopo Mulatti, Roberto Annunziata, Marco Maccarrone | 2001-07-24 |
| 6237104 | Method and a related circuit for adjusting the duration of a synchronization signal ATD for timing the access to a non-volatile memory | Rino Micheloni, Stefano Commodaro, Guido Lomazzi | 2001-05-22 |
| 6215329 | Output stage for a memory device and for low voltage applications | Stefano Zanardi, Andrea Ghilardelli | 2001-04-10 |
| 6184741 | Bidirectional charge pump generating either a positive or negative voltage | Andrea Ghilardelli, Jacopo Mulatti | 2001-02-06 |
| 6181602 | Device and method for reading nonvolatile memory cells | Rino Micheloni, Alfonso Maurelli | 2001-01-30 |
| 6169423 | Method and circuit for regulating the length of an ATD pulse signal | Rino Micheloni, Matteo Zammattio, Donato Ferrario | 2001-01-02 |
| 6157225 | Driving circuit with three output levels, one output level being a boosted level | Rino Micheloni, Marco Maccarrone, Maurizio Branchetti | 2000-12-05 |
| 6151251 | Memory cell integrated structure with corresponding biasing device | Stefano Zanardi, Maurizio Branchetti, Stefano Ghezzi | 2000-11-21 |
| 6150844 | High voltage tolerance output stage | Stefano Zanardi, Carla Golla | 2000-11-21 |
| 6144589 | Boosting circuit, particularly for a memory device | Rino Micheloni, Donato Ferrario, Carla Golla | 2000-11-07 |
| 6128225 | Method and circuit for reading low-supply-voltage nonvolatile memory cells | Rino Micheloni, Stefano Commodaro | 2000-10-03 |
| 6122200 | Row decoder for a flash-EEPROM memory device with the possibility of selective erasing of a sub-group of rows of a sector | Rino Micheloni | 2000-09-19 |
| 6111809 | Line decoder for a low supply voltage memory device | Rino Micheloni | 2000-08-29 |