Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10930607 | Manufacturing process for separating logic and memory array | Hem Takiar, Michael Mostovoy, Gokul Kumar, Yan Li | 2021-02-23 |
| 10522489 | Manufacturing process for separating logic and memory array | Hem Takiar, Michael Mostovoy, Gokul Kumar, Yan Li | 2019-12-31 |
| 9715913 | Temperature code circuit with single ramp for calibration and determination | Jiang Yin, Jongmin Park, Steve Choi | 2017-07-25 |
| RE45813 | Reducing the impact of interference during programming | Dana Lee | 2015-11-24 |
| RE45771 | Optimized page programming order for non-volatile memory | Steven T. Sprouse, Jianmin Huang, Chris Avila, Yichao Huang | 2015-10-20 |
| RE43870 | Reducing the impact of interference during programming | Dana Lee | 2012-12-25 |
| 8184479 | Reducing the impact of interference during programming | Dana Lee | 2012-05-22 |
| 8180994 | Optimized page programming order for non-volatile memory | Steven T. Sprouse, Jianmin Huang, Chris Avila, Yichao Huang | 2012-05-15 |
| 8094492 | Reducing the impact of interference during programming | Dana Lee | 2012-01-10 |
| 7936602 | Use of data latches in cache operations of non-volatile memories | Yan Li | 2011-05-03 |
| 7869273 | Reducing the impact of interference during programming | Dana Lee | 2011-01-11 |
| 7577037 | Use of data latches in cache operations of non-volatile memories | Yan Li | 2009-08-18 |
| 7467253 | Cycle count storage systems | — | 2008-12-16 |
| 7451264 | Cycle count storage methods | — | 2008-11-11 |
| 7206230 | Use of data latches in cache operations of non-volatile memories | Yan Li | 2007-04-17 |
| 6418051 | Non-volatile memory device with configurable row redundancy | Alessandro Manstretta, Rino Micheloni, Andrea Pierin | 2002-07-09 |
| 6396168 | Programmable logic arrays | Stefano Ghezzi, Donato Ferrario, Giovanni Campardo | 2002-05-28 |
| 6140876 | Differential amplifier with MOS transistor | — | 2000-10-31 |
| 6049497 | Electrically modifiable multilevel non-volatile memory comprising internal refresh means | — | 2000-04-11 |
| 6038173 | Memory read circuit with dynamically controlled precharging device | — | 2000-03-14 |
| 5986937 | Memory read circuit with precharging limitation device | — | 1999-11-16 |
| 5969961 | Load pump type of voltage generator circuit | — | 1999-10-19 |
| 5923590 | Device for reading cells of a memory | — | 1999-07-13 |
| 5889702 | Read circuit for memory adapted to the measurement of leakage currents | Jean-Marie Gaultier | 1999-03-30 |
| 5859798 | Read circuit for non-volatile memory working with a low supply voltage | — | 1999-01-12 |