Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10735390 | Method for authentication and electronic device supporting the same | Jaehwan Kim, Junghun KIM, Jinwoo Lee, Yongjoon Jeon, Bokun CHOI +3 more | 2020-08-04 |
| 10665534 | Semiconductor device and method of using partial wafer singulation for improved wafer level embedded system in package | KyungHoon Lee, KyoungIl Huh, DaeSik Choi | 2020-05-26 |
| 9872176 | Method for processing authentication, electronic device and server for supporting the same | Junghun KIM, Jaehwan Kim, Yongseok Park, Jisup Lee | 2018-01-16 |
| 9799590 | Semiconductor device and method of using partial wafer singulation for improved wafer level embedded system in package | KyungHoon Lee, KyoungIl Huh, DaeSik Choi | 2017-10-24 |
| 9794606 | Transmission of digital content to select devices | Hyunho Park, Jupyo Hong | 2017-10-17 |
| 9318380 | Semiconductor device and method of forming stacked semiconductor die and conductive interconnect structure through an encapsulant | Youngjoon KIM, YongHyuk Jeong | 2016-04-19 |
| 8816404 | Semiconductor device and method of forming stacked semiconductor die and conductive interconnect structure through an encapsulant | Youngjoon KIM, YongHyuk Jeong | 2014-08-26 |
| 8723310 | Integrated circuit packaging system having warpage prevention structures | YiSu Park, KyungHoon Lee, Joungln Yang, DaeSik Choi | 2014-05-13 |
| 8679900 | Integrated circuit packaging system with heat conduction and method of manufacture thereof | DaeSik Choi, Minjung Kim, MinWook Yu | 2014-03-25 |
| 8466567 | Integrated circuit packaging system with stack interconnect and method of manufacture thereof | DaeSik Choi, Oh Han Kim | 2013-06-18 |
| 8372695 | Integrated circuit packaging system with stack interconnect and method of manufacture thereof | Minjung Kim | 2013-02-12 |