Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430108 | Multistage compiler architecture | Ulf Hanebutte, Senad Durakovic, Fu-Hwa Wang, Mohana Tandyala | 2025-09-30 |
| 12293174 | Method and system for memory management within machine learning inference engine | Nikhil Bernard John Stephen, Senad Durakovic, Pranav Jonnalagadda, Ulf Hanebutte | 2025-05-06 |
| 12190086 | Method and apparatus for ML graphs by a compiler | Ulf Hanebutte, Senad Durakovic, Pranav Jonnalagadda | 2025-01-07 |
| 12174727 | Method and apparatus for correlating high-level code with low-level instructions for machine learning applications | Ulf Hanebutte, Harri Hakkarainen, Senad Durakovic | 2024-12-24 |
| 11995448 | Method and apparatus for performing machine learning operations in parallel on machine learning hardware | Avinash Sodani, Ulf Hanebutte, Harri Hakkarainen | 2024-05-28 |
| 11977475 | Method and apparatus for compiler and low-level instruction validation of machine learning operations on hardware | Senad Durakovic, Ulf Hanebutte, Harri Hakkarainen, Yao-Nan Chou, Veena Karthikeyan | 2024-05-07 |
| 11733983 | Method and apparatus for generating metadata by a compiler | Senad Durakovic, Ulf Hanebutte, Harri Hakkarainen | 2023-08-22 |
| 11467811 | Method and apparatus for generating metadata by a compiler | Senad Durakovic, Ulf Hanebutte, Harri Hakkarainen | 2022-10-11 |
| 10664421 | Reordering responses in a high performance on-chip network | Jeremy Chan, Drew E. Wingard, Herve Alexanian, Kevin L. Daberkow, Harutyun Aslanyan +1 more | 2020-05-26 |
| 10303628 | Reordering responses in a high performance on-chip network | Jeremy Chan, Drew E. Wingard, Herve Alexanian, Kevin L. Daberkow, Harutyun Aslanyan +1 more | 2019-05-28 |
| 10062422 | Various methods and apparatus for configurable mapping of address regions onto one or more aggregate targets | Drew E. Wingard, Stephen W. Hamilton, Ian A. Swarbrick, Vida Vakilotojar | 2018-08-28 |
| 9495290 | Various methods and apparatus to support outstanding requests to multiple targets while maintaining transaction ordering | Drew E. Wingard, Stephen W. Hamilton, Ian A. Swarbrick, Vida Vakilotojar | 2016-11-15 |
| 9292436 | Various methods and apparatus to support transactions whose data address sequence within that transaction crosses an interleaved channel address boundary | Drew E. Wingard, Stephen W. Hamilton, Ian A. Swarbrick, Vida Vakilotojar | 2016-03-22 |
| 9087036 | Methods and apparatuses for time annotated transaction level modeling | Alan Kamas | 2015-07-21 |
| 8972995 | Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads | Krishnan Srinivasan, Ruben Khazhakyan, Harutyan Aslanyan, Drew E. Wingard | 2015-03-03 |
| 8868397 | Transaction co-validation across abstraction layers | Herve Alexanian | 2014-10-21 |
| 8504992 | Method and apparatus for establishing a quality of service model | Wolf-Dietrich Weber, Drew E. Wingard | 2013-08-06 |
| 8438320 | Various methods and apparatus for address tiling and channel interleaving throughout the integrated system | Krishnan Srinivasan, Drew E. Wingard | 2013-05-07 |
| 8407433 | Interconnect implementing internal controls | Drew E. Wingard, Stephen W. Hamilton, Ian A. Swarbrick, Vida Vakilotojar | 2013-03-26 |
| 8229723 | Performance software instrumentation and analysis for electronic design automation | Krishnan Srinivasan, Drew E. Wingard | 2012-07-24 |
| 8108648 | Various methods and apparatus for address tiling | Krishnan Srinivasan, Drew E. Wingard, Vida Vakilotojar | 2012-01-31 |
| 8073820 | Method and system for a database to monitor and analyze performance of an electronic design | Krishnan Srinivasan, Pascal Chauvet | 2011-12-06 |
| 8032329 | Method and system to monitor, debug, and analyze performance of an electronic design | Stephen W. Hamilton, Drew E. Wingard, Pascal Chauvet | 2011-10-04 |
| 8020124 | Various methods and apparatuses for cycle accurate C-models of components | Herve Alexanian, Vida Vakilotojar, Grigor Yeghiazaryan | 2011-09-13 |
| 7660932 | Composing on-chip interconnects with configurable interfaces | Wolf-Dietrich Weber, Drew E. Wingard | 2010-02-09 |