Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11101235 | Fabrication method of semiconductor package with stacked semiconductor chips | — | 2021-08-24 |
| 10950507 | Electrical testing method of interposer | Chi-Hsin Chiu, Shih-Kuang Chiu | 2021-03-16 |
| 10796970 | Method for fabricating electronic package | Chang-Lun Lu | 2020-10-06 |
| 10622323 | Fabrication method of semiconductor package with stacked semiconductor chips | — | 2020-04-14 |
| 10461002 | Fabrication method of electronic module | Chang-Lun Lu, Shih-Ching Chen | 2019-10-29 |
| 10403570 | Method for fabricating electronic package | Hung-Yuan Li, Chieh-Lung Lai, Shih-Liang Peng, Chang-Lun Lu | 2019-09-03 |
| 10242972 | Package structure and fabrication method thereof | Chang-Lun Lu, Shih-Ching Chen, Guang-Hwa Ma, Cheng-Hsu Hsiao | 2019-03-26 |
| 10211082 | Fabrication method of electronic package | Chang-Lun Lu | 2019-02-19 |
| 10201086 | Electronic device | Cheng-Hsiang Liu, Chang-Lun Lu, Jun Liao, Cheng-Yi Chen | 2019-02-05 |
| 10141233 | Electronic package and fabrication method thereof | Chang-Lun Lu | 2018-11-27 |
| 10128178 | Electronic package and method for fabricating the same | Hung-Yuan Li, Chieh-Lung Lai, Shih-Liang Peng, Chang-Lun Lu | 2018-11-13 |
| 9997481 | Semiconductor package with stacked semiconductor chips | — | 2018-06-12 |
| 9991178 | Interposer and electrical testing method thereof | Chi-Hsin Chiu, Shih-Kuang Chiu | 2018-06-05 |
| 9818635 | Carrier structure, packaging substrate, electronic package and fabrication method thereof | Chang-Lun Lu | 2017-11-14 |
| 9735075 | Electronic module and fabrication method thereof | Chang-Lun Lu, Shih-Ching Chen | 2017-08-15 |
| 9601403 | Electronic package and fabrication method thereof | Guang-Hwa Ma, Shih-Ching Chen, Chang-Lun Lu | 2017-03-21 |
| 9515039 | Substrate structure with first and second conductive bumps having different widths | Chieh-Lung Lai, Yu-Chuan Chen, Chang-Lun Lu | 2016-12-06 |
| 9269602 | Fabrication method of wafer level semiconductor package and fabrication method of wafer level packaging substrate | — | 2016-02-23 |
| 7035835 | High-precision current-mode pulse-width-modulation circuit | Bingxue Shi, Chun-Ming Lu | 2006-04-25 |
| 6946894 | Current-mode synapse multiplier circuit | Bingxue Shi, Chun-Ming Lu | 2005-09-20 |
| 6876989 | Back-propagation neural network with enhanced neuron characteristics | Bingxue Shi, Chun-Ming Lu | 2005-04-05 |
| 6809558 | Push-pull output neuron circuit | Bingxue Shi, Chun-Ming Lu | 2004-10-26 |
| 6664818 | Current controlled sigmoid neural circuit | Bingxue Shi, Chun-Ming Lu | 2003-12-16 |
| 6583520 | Dual-switching and dual-linear power controller chip | Bingxue Shi, Chun-Sheng Lu | 2003-06-24 |
| 6480367 | Dual-switching and dual-linear power controller chip | Bingxue Shi, Chun-Sheng Lu | 2002-11-12 |