Issued Patents All Time
Showing 176–184 of 184 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8975131 | Self-aligned method of forming a semiconductor memory array of floating gate memory cells with single poly layer | Vipin Tiwari, Hieu Van Tran, Xian Liu | 2015-03-10 |
| 8811093 | Non-volatile memory device and a method of operating same | Hieu Van Tran, Hung Quoc Nguyen | 2014-08-19 |
| 8785307 | Method of forming a memory cell by reducing diffusion of dopants under a gate | Xian Liu, Mandana Tadayoni, Chien-Sheng Su | 2014-07-22 |
| 8711636 | Method of operating a split gate flash memory cell with coupling gate | Elizabeth Cuevas, Yuri Tkachev, Mandana Tadayoni, Henry A. Om'Mani | 2014-04-29 |
| 8513728 | Array of split gate non-volatile floating gate memory cells having improved strapping of the coupling gates | Parviz Ghazavi, Hieu Van Tran, Shiuh-Luen Wang, Henry A. Om'Mani | 2013-08-20 |
| 8384147 | High endurance non-volatile memory cell and array | Amitay Levi | 2013-02-26 |
| 8148768 | Non-volatile memory cell with self aligned floating and erase gates, and method of making same | Amitay Levi | 2012-04-03 |
| 7851846 | Non-volatile memory cell with buried select gate, and method of making same | Hieu Van Tran, Amitay Levi | 2010-12-14 |
| 6140832 | Method of utilizing IDDQ tests to screen out defective parts | Truc Q. Vu, Emad Zawaideh, Glenn M. Kramer | 2000-10-31 |