Issued Patents All Time
Showing 51–69 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5674769 | Process for forming deep trench DRAMs with sub-groundrule gates | Johann Alsmeier, Christine Dehm, Erwin Hammerl | 1997-10-07 |
| 5670805 | Controlled recrystallization of buried strap in a semiconductor memory device | Erwin Hammerl, Jack A. Mandelman, Herbert L. Ho, Junichi Shiozawa | 1997-09-23 |
| 5663107 | Global planarization using self aligned polishing or spacer technique and isotropic etch process | Matthias Peschke | 1997-09-02 |
| 5643836 | Method for producing a semiconductor layer structure having a planarized surface and the use thereof in the manufacture of bipolar transistors and DRAMS | Thomas Meister | 1997-07-01 |
| 5627092 | Deep trench dram process on SOI for low leakage DRAM cell | Johann Alsmeier | 1997-05-06 |
| 5543348 | Controlled recrystallization of buried strap in a semiconductor memory device | Erwin Hammerl, Jack A. Mandelman, Herbert L. Ho, Junichi Shiozawa | 1996-08-06 |
| 5498567 | Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor | Helmut Klose, Thomas Meister, Hans-Willi Meul | 1996-03-12 |
| 5449310 | Method for manufacturing rod-shaped silicon structures | Wolfgang Hoenlein | 1995-09-12 |
| 5432120 | Method for producing a laterally limited single-crystal region with selective epitaxy and the employment thereof for manufacturing a bipolar transistor as well as a MOS transistor | Thomas Meister | 1995-07-11 |
| 5422303 | Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor | Helmut Klose, Thomas Meister, Hans-Willi Meul | 1995-06-06 |
| 5360759 | Method for manufacturing a component with porous silicon | Wolfgang Hoenlein, Volker Lehmann, Andreas Spitzer | 1994-11-01 |
| 5326718 | Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor | Helmut Klose, Thomas Meister, Hans-Willi Meul | 1994-07-05 |
| 5306647 | Method for manufacturing a solar cell from a substrate wafer | Volker Lehmann, Hermann Wendt, Wolfgang Hoenlein, Josef Willer | 1994-04-26 |
| 5188977 | Method for manufacturing an electrically conductive tip composed of a doped semiconductor material | Hans-Willi Meul, Wolfgang Hoenlein | 1993-02-23 |
| 5113237 | Planar pn-junction of high electric strength | — | 1992-05-12 |
| 4980742 | Turn-off thyristor | Klaus-Guenter Oppermann | 1990-12-25 |
| 4907056 | Semiconductor component comprising a planar pn-junction | Ulrich M. Goesele | 1990-03-06 |
| 4883215 | Method for bubble-free bonding of silicon wafers | Ulrich M. Goesele | 1989-11-28 |
| 4672738 | Method for the manufacture of a pn junction with high breakdown voltage | Ulrich M. Goesele, Christine Fellinger | 1987-06-16 |