Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10727297 | Complimentary metal-oxide-semiconductor circuit having transistors with different threshold voltages and method of manufacturing the same | Wei-E Wang | 2020-07-28 |
| 10644031 | Method for selectively increasing silicon fin area for vertical field effect transistors | Kang-ill Seo, Borna J. Obradovic | 2020-05-05 |
| 10586738 | Method of providing source and drain doping for CMOS architecture including FinFET and semiconductor devices so formed | Wei-E Wang, Mark S. Rodder, Borna J. Obradovic | 2020-03-10 |
| 10497719 | Method for selectively increasing silicon fin area for vertical field effect transistors | Kang-ill Seo, Borna J. Obradovic | 2019-12-03 |
| 10381315 | Method and system for providing a reverse-engineering resistant hardware embedded security module | Harsono S. Simka, Ganesh Hegde, Rwik Sengupta, Mark S. Rodder | 2019-08-13 |
| 10312152 | Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same | Mark S. Rodder, Borna J. Obradovic, Seung Hun Lee, Pan-Kwi Park, Seung-ryul Lee | 2019-06-04 |
| 10205025 | Methods to achieve strained channel finFET devices | Jorge A. Kittl, Dharmendar Reddy Palle, Mark S. Rodder | 2019-02-12 |
| 10181527 | FinFet having dual vertical spacer and method of manufacturing the same | Dharmendar Reddy Palle, Borna J. Obradovic, Mark S. Rodder | 2019-01-15 |
| 10164121 | Stacked independently contacted field effect transistor having electrically separated first and second gates | Ryan M. Hatcher, Borna J. Obradovic, Rwik Sengupta | 2018-12-25 |
| 10026652 | Horizontal nanosheet FETs and method of manufacturing the same | Wei-E Wang, Mark S. Rodder, Borna J. Obradovic | 2018-07-17 |
| 10008583 | Gate-all-around nanosheet field-effect transistors and methods of manufacturing the same | Mark S. Rodder | 2018-06-26 |
| 9978833 | Methods for varied strain on nano-scale field effect transistor devices | Jorge A. Kittl, Dharmendar Reddy Palle, Mark S. Rodder | 2018-05-22 |
| 9905672 | Method of forming internal dielectric spacers for horizontal nanosheet FET architectures | Wei-E Wang, Mark S. Rodder, Borna J. Obradovic, Dharmendar Reddy Palle | 2018-02-27 |
| 9899529 | Method to make self-aligned vertical field effect transistor | Borna J. Obradovic, Mark S. Rodder | 2018-02-20 |
| 9871139 | Sacrificial epitaxial gate stressors | Jorge A. Kittl, Dharmendar Reddy Palle, Mark S. Rodder | 2018-01-16 |
| 9711414 | Strained stacked nanosheet FETS and/or quantum well stacked nanosheet | Ryan M. Hatcher, Robert C. Bowen, Mark S. Rodder, Borna J. Obradovic | 2017-07-18 |
| 9685564 | Gate-all-around field effect transistors with horizontal nanosheet conductive channel structures for MOL/inter-channel spacing and related cell architectures | Rwik Sengupta, Mark S. Rodder, Titash Rakshit | 2017-06-20 |
| 9653287 | S/D connection to individual channel layers in a nanosheet FET | Mark S. Rodder, Jorge A. Kittl, Borna J. Obradovic | 2017-05-16 |
| 9614002 | 0T bi-directional memory cell | Ryan M. Hatcher, Titash Rakshit, Borna J. Obradovic, Jorge A. Kittl | 2017-04-04 |
| 9601586 | Methods of forming semiconductor devices, including forming a metal layer on source/drain regions | Jorge A. Kittl, Mark S. Rodder | 2017-03-21 |
| 9570395 | Semiconductor device having buried power rail | Rwik Sengupta, Mark S. Rodder | 2017-02-14 |
| 8716117 | Semiconductor device and method of forming the same | Myeongcheol Kim, Sooyeon Jeong, Dohyoung Kim, Yongjin Kim, Jin-Wook Lee +1 more | 2014-05-06 |