Issued Patents All Time
Showing 26–50 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10566330 | Dielectric separation of partial GAA FETs | Mark S. Rodder, Dharmendar Reddy Palle, Rwik Sengupta, Mohammad Ali Pourghaderi | 2020-02-18 |
| 10497719 | Method for selectively increasing silicon fin area for vertical field effect transistors | Joon Goo Hong, Kang-ill Seo | 2019-12-03 |
| 10461751 | FE-FET-based XNOR cell usable in neuromorphic computing | Ryan M. Hatcher, Jorge A. Kittl, Titash Rakshit | 2019-10-29 |
| 10446400 | Method of forming multi-threshold voltage devices and devices so formed | Wei-E Wang, Mark S. Rodder | 2019-10-15 |
| 10381271 | Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same | Mark S. Rodder | 2019-08-13 |
| 10312152 | Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same | Mark S. Rodder, Joon Goo Hong, Seung Hun Lee, Pan-Kwi Park, Seung-ryul Lee | 2019-06-04 |
| 10297673 | Methods of forming semiconductor devices including conductive contacts on source/drains | Jorge A. Kittl, Ganesh Hegde, Rwik Sengupta, Mark S. Rodder | 2019-05-21 |
| 10199474 | Field effect transistor with decoupled channel and methods of manufacturing the same | Mark S. Rodder | 2019-02-05 |
| 10181527 | FinFet having dual vertical spacer and method of manufacturing the same | Dharmendar Reddy Palle, Joon Goo Hong, Mark S. Rodder | 2019-01-15 |
| 10170549 | Strained stacked nanosheet FETs and/or quantum well stacked nanosheet | Jorge A. Kittl, Robert C. Bowen, Mark S. Rodder | 2019-01-01 |
| 10164121 | Stacked independently contacted field effect transistor having electrically separated first and second gates | Ryan M. Hatcher, Joon Goo Hong, Rwik Sengupta | 2018-12-25 |
| 10147793 | FinFET devices including recessed source/drain regions having optimized depths | Mark S. Rodder, Jorge A. Kittl, Robert C. Bowen, Ryan M. Hatcher | 2018-12-04 |
| 10026652 | Horizontal nanosheet FETs and method of manufacturing the same | Wei-E Wang, Mark S. Rodder, Joon Goo Hong | 2018-07-17 |
| 10026751 | Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the same | Titash Rakshit, Rwik Sengupta, Wei-E Wang, Ryan M. Hatcher, Mark S. Rodder | 2018-07-17 |
| 10008580 | FET including an InGaAs channel and method of enhancing performance of the FET | Titash Rakshit, Mark S. Rodder | 2018-06-26 |
| 9966137 | Low power analog or multi-level memory for neuromorphic computing | Titash Rakshit | 2018-05-08 |
| 9960232 | Horizontal nanosheet FETs and methods of manufacturing the same | Titash Rakshit, Mark S. Rodder | 2018-05-01 |
| 9917158 | Device contact structures including heterojunctions for low contact resistance | Jorge A. Kittl, Robert C. Bowen, Mark S. Rodder | 2018-03-13 |
| 9905672 | Method of forming internal dielectric spacers for horizontal nanosheet FET architectures | Wei-E Wang, Mark S. Rodder, Dharmendar Reddy Palle, Joon Goo Hong | 2018-02-27 |
| 9899529 | Method to make self-aligned vertical field effect transistor | Joon Goo Hong, Mark S. Rodder | 2018-02-20 |
| 9870940 | Methods of forming nanosheets on lattice mismatched substrates | Wei-E Wang, Mark S. Rodder | 2018-01-16 |
| 9853114 | Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same | Mark S. Rodder | 2017-12-26 |
| 9831323 | Structure and method to achieve compressively strained Si NS | Jorge A. Kittl, Ganesh Hegde, Robert C. Bowen, Mark S. Rodder | 2017-11-28 |
| 9812449 | Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitance | Titash Rakshit, Mark S. Rodder, Wei-E Wang | 2017-11-07 |
| 9805795 | Zero leakage, high noise margin coupled giant spin hall based retention latch | Titash Rakshit | 2017-10-31 |