MH

Mark A. Horowitz

RA Rambus: 213 patents #6 of 549Top 2%
Stanford University: 30 patents #37 of 5,197Top 1%
RE Renesas Electronics: 1 patents #2,739 of 4,529Top 65%
Meta: 1 patents #4,098 of 6,845Top 60%
📍 Menlo Park, CA: #4 of 3,774 inventorsTop 1%
🗺 California: #361 of 386,348 inventorsTop 1%
Overall (All Time): #2,053 of 4,157,543Top 1%
247
Patents All Time

Issued Patents All Time

Showing 226–247 of 247 patents

Patent #TitleCo-InventorsDate
5717362 Array oscillator circuit John George Maneatis 1998-02-10
5715407 Process and apparatus for collision detection on a parallel bus by monitoring a first line of the bus during even bus cycles for indications of overlapping packets Richard M. Barth, Matthew Murdy Griffin, Frederick A. Ware 1998-02-03
5657481 Memory device with a phase locked loop circuitry Michael Farmwald 1997-08-12
5638334 Integrated circuit I/O using a high performance bus interface Michael Farmwald 1997-06-10
5606717 Memory circuitry having bus interface for receiving information in packets and access time registers Michael Farmwald 1997-02-25
5596610 Delay stage circuitry for a ring oscillator Wingyu Leung 1997-01-21
5513327 Integrated circuit I/O using a high performance bus interface Michael Farmwald 1996-04-30
5499385 Method for accessing and transmitting data to/from a memory in packets Michael Farmwald 1996-03-12
5485490 Method and circuitry for clock synchronization Wingyu Leung 1996-01-16
5475344 Multiple interconnected ring oscillator circuit John George Maneatis 1995-12-12
5473575 Integrated circuit I/O using a high performance bus interface Michael Farmwald 1995-12-05
5446696 Method and apparatus for implementing refresh in a synchronous DRAM system Frederick A. Ware, James A. Gasbarro, John B. Dillon, Michael Farmwald, Matthew Murdy Griffin 1995-08-29
5432823 Method and circuitry for minimizing clock-data skew in a bus system James A. Gasbarro, Richard M. Barth, Winston Lee, Wingyu Leung, Paul Michael Farmwald 1995-07-11
5408129 Integrated circuit I/O using a high performance bus interface Michael Farmwald 1995-04-18
5357195 Testing set up and hold input timing parameters of high speed integrated circuit devices James A. Gasbarro 1994-10-18
5355391 High speed bus system Winston Lee 1994-10-11
5337285 Method and apparatus for power control in devices Frederick A. Ware, James A. Gasbarro, John B. Dillon, Matthew Murdy Griffin, Richard M. Barth 1994-08-09
5325053 Apparatus for testing timing parameters of high speed integrated circuit devices James A. Gasbarro 1994-06-28
5319755 Integrated circuit I/O using high performance bus interface Michael Farmwald 1994-06-07
5268639 Testing timing parameters of high speed integrated circuit devices James A. Gasbarro 1993-12-07
5254883 Electrical current source circuitry for a bus James A. Gasbarro, Wingyu Leung 1993-10-19
5243703 Apparatus for synchronously generating clock signals in a data processing system Michael Farmwald 1993-09-07